Patents by Inventor Shuishi Takayama

Shuishi Takayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6324639
    Abstract: A processor can decode short instructions with a word length equal to one unit field and long instructions with a word length equal to two unit fields. An opcode of each kind of instruction is arranged into the first unit field assigned to the instruction. The number of instructions to be executed by the processor in parallel is s. When the ratio of short to long instructions is s-1:1, the s-1 short instructions are assigned to the first unit field to the s-1th unit field in the parallel execution code, and the long instruction is assigned to the sth unit field to the (s+k−1)th unit field in the same parallel execution code.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: November 27, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Taketo Heishi, Tetsuya Tanaka, Nobuo Higaki, Shuishi Takayama, Kensuke Odani