Patents by Inventor Shuji Ariga

Shuji Ariga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7667569
    Abstract: A chip resistor includes: a pair of upper surface electrodes formed at opposing side portions of a rectangular substrate as opposed to each other with respect to a center line of the rectangular substrate extending in a direction connecting the side portions; a resistive element formed on the rectangular substrate to be electrically connected with the upper surface electrode pair; and a pair of end surface electrodes formed on end surfaces of the opposing side portions of the rectangular substrate and electrically connected with the upper surface electrode pair. The chip resistor further includes dummy electrodes formed individually at the opposing side portions of the rectangular substrate at positions corresponding to the upper surface electrode pair in the direction connecting the side portions.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: February 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Takeshi Iseki, Shuji Ariga, Mitsuaki Nakao
  • Publication number: 20080290460
    Abstract: A chip resistor includes: a pair of upper surface electrodes formed at opposing side portions of a rectangular substrate as opposed to each other with respect to a center line of the rectangular substrate extending in a direction connecting the side portions; a resistive element formed on the rectangular substrate to be electrically connected with the upper surface electrode pair; and a pair of end surface electrodes formed on end surfaces of the opposing side portions of the rectangular substrate and electrically connected with the upper surface electrode pair. The chip resistor further includes dummy electrodes formed individually at the opposing side portions of the rectangular substrate at positions corresponding to the upper surface electrode pair in the direction connecting the side portions.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 27, 2008
    Inventors: Takeshi Iseki, Shuji Ariga, Mitsuaki Nakao
  • Patent number: 6084502
    Abstract: The present invention is directed towards a resistor which has higher load-, surge-, and pulse-resistant characteristics and is capable of having a resistance adjusted at a higher rate of precision. A pair of electrodes 12 and a main resistance path 13 between the two electrodes 12 are mounted on a substrate 11. The main resistance path 13 is joined to a set of first rungs 14 which extend parallel to the main resistance path 13 and are joined with two first connecting paths 15 to form a first ladder-like resistance path for rough adjustment of the resistance which is connected to a part of the main resistance path 13. Also, a second ladder-like resistance path for fine adjustment of the resistance which comprises a set of second rungs 16 extending vertically from the main resistance path 13 and two second connecting paths 17 joining the second rungs 16 together is formed and connected to a part of the main resistance path 13.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: July 4, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Ariga, Takeshi Iseki