Abstract: Provided is a method for forming a Cu wiring that does not cause Cu elution during CMP when a Ru material is used as a barrier metal film for the Cu wiring. The method has a step (d) of removing a second barrier metal film (Ru film) formed on a first barrier metal film on an upper surface of an interlayer insulating film, and a step (e) of depositing a seed copper (Cu) film on the first and the second barrier metal films after the step (d). By removing the second barrier metal film on the upper surface before the seed copper film is formed, copper is prevented from eluding into a slurry due to a battery effect of the second barrier metal film and copper.

Abstract: Wiring grooves are formed on a first interlayer insulating film 2 on a semiconductor substrate 1; first Cu wires 5 are formed by stacking first Cu films 4 in the wiring grooves; a first liner film 6 is formed on the first Cu wires 5 and the first interlayer insulating film 2; openings 13 are partially formed on the first Cu wires 5 so as to expose the surfaces of the first Cu wires 5 on the first liner film 6; and cap metal films 7 are formed on the surfaces of the first Cu wires 5 exposed in the openings 13.

Abstract: While a semiconductor substrate having a metal film formed thereover by electrolytic plating is rotated, an etching solution for the metal film is supplied to the peripheral portion of the metal film at a first flow rate and then the etching solution is continuously supplied at a second flow rate, which is lower than the first flow rate.

Abstract: After bubbles adsorbed to a substrate are removed by rotating the substrate in a plating solution at a higher speed or after the wettability of the surface of the substrate to be plated is improved before the substrate is immersed in the plating solution, the substrate is rotated in the plating solution at a lower speed so that a plating process is performed with respect to the substrate.

Abstract: After a thin first conductive film is formed on a barrier film having a crystal structure, a second conductive film is formed on the first conductive film. Thereafter, the first conductive film and the second conductive film are heated such that the first and second conductive films are integrated to form a third conductive film.

Abstract: After a thin first conductive film is formed on a barrier film having a crystal structure, a second conductive film is formed on the first conductive film. Thereafter, the first conductive film and the second conductive film are heated such that the first and second conductive films are integrated to form a third conductive film.

Abstract: After bubbles adsorbed to a substrate are removed by rotating the substrate in a plating solution at a higher speed or after the wettability of the surface of the substrate to be plated is improved before the substrate is immersed in the plating solution, the substrate is rotated in the plating solution at a lower speed so that a plating process is performed with respect to the substrate.

Abstract: A value of a current flowing through a plating solution to a first working electrode whose base is exposed in a first opening is measured, and a value of a current flowing through the plating solution to a second working electrode whose base is exposed in a second opening having an opening area larger than that of the first opening is measured.

Abstract: A producing method of the present invention includes (i) forming a wiring line above a semiconductor substrate, (ii) forming an insulating layer above the semiconductor substrate and the wiring line, (iii) forming an opening penetrating the insulating layer in the insulating layer with respect to a portion above the wiring line, (iv) forming a barrier layer whose surface is formed of a material A, so as to cover a surface of the insulating layer and an inner surface of the opening, (v) forming a metal layer made of a first metal on the barrier layer, and (vi) depositing a second metal inside the opening by a plating, thus forming a via plug containing the second metal. A rest potential PA of the material A with respect to the second metal is larger than a rest potential PM of the first metal with respect to the second metal.

Abstract: A first electrode and a first insulating layer of electrode insulation are formed on a first semiconductor substrate. A second electrode and a second insulating layer of electrode insulation are formed on a second semiconductor substrate. The first semiconductor substrate has at its surface a pattern of recesses/projections (i.e., a pattern of sawteeth in cross section) at regular intervals in stripe arrangement. Likewise, the second semiconductor substrate has at its surface a pattern of recesses/projections (i.e., a pattern of sawteeth in cross section) at regular intervals in stripe arrangement, wherein the pattern of the second semiconductor substrate has a phase shift of 180 degrees with respect to the pattern of the first semiconductor substrate. The first and second semiconductor substrates are bonded together with their patterns in engagement.

Abstract: On an insulating substrate are formed first aluminum interconnections. In openings formed in a silicon dioxide film are formed unit cells each consisting of a tungsten electrode and an aluminum alloy electrode containing silicon. Over the silicon dioxide film are formed a large number of linear second aluminum interconnections which are orthogonal to the first aluminum interconnections. At the individual intersections of the first and second aluminum interconnections are disposed the unit cells so as to compose a memory cell array. When a large current is allowed to flow through the unit cell, silicon in the aluminum alloy electrode moves in a direction opposite to the current flow and is precipitated in the aluminum electrode in the vicinity of the interface with the tungsten electrode, resulting in an increase in resistance value. When a large current is allowed to flow through the unit cell in the opposite direction, silicon is diffused, resulting in a reduction in resistance value.

Abstract: A method of the invention for fabricating a semiconductor device includes the steps of: forming an oxide film having a non-uniform thickness on silicon; reducing at least a portion of the oxide film using gas containing a metal element, and growing a metal film containing the metal element on the silicon by reacting an exposed surface of the silicon with the gas; and removing the metal film.

Abstract: A method of the invention for fabricating a semiconductor device includes the steps of: forming an oxide film having a non-uniform thickness on silicon; reducing at least a portion of the oxide film using gas containing a metal element, and growing a metal film containing the metal element on the silicon by reacting an exposed surface of the silicon with the gas; and removing the metal film.

Abstract: On an insulating substrate are formed first aluminum interconnections. In openings formed in a silicon dioxide film are formed unit cells each consisting of a tungsten electrode and an aluminum alloy electrode containing silicon. Over the silicon dioxide film are formed a large number of linear second aluminum interconnections which are orthogonal to the first aluminum interconnections. At the individual intersections of the first and second aluminum interconnections are disposed the unit cells so as to compose a memory cell array. When a large current is allowed to flow through the unit cell, silicon in the aluminum alloy electrode moves in a direction opposite to the current flow and is precipitated in the aluminum electrode in the vicinity of the interface with the tungsten electrode, resulting in an increase in resistance value. When a large current is allowed to flow through the unit cell in the opposite direction, silicon is diffused, resulting in a reduction in resistance value.

Abstract: A method of the invention for fabricating a semiconductor device includes the steps of: forming an oxide film having a non-uniform thickness on silicon; reducing at least a portion of the oxide film using gas containing a metal element, and growing a metal film containing the metal element on the silicon by reacting an exposed surface of the silicon with the gas; and removing the metal film.

Abstract: After accumulating a BPSG film layer on a silicon substrate, a first Al--Si--Cu film layer, a W film layer and a second Al--Si--Cu film layer are successively accumulated on this BPSG film layer. A resist pattern with wide-width and narrow-width pattern portions is formed on the second Al--Si--Cu film layer. The wide-width pattern portion is provided at a position corresponding to a contact for connecting a first-layer metallic wiring and a second-layer metallic wiring, while the narrow-width pattern portion is provided at a position corresponding to a wiring portion for the first-layer metallic wiring. After applying first etching on the second Al--Si--Cu film layer with a mask of the resist patter, second etching is applied on the W film layer. Thereafter, by applying third etching, the resist pattern remaining on the first-layer metallic wiring is removed and the first Al--Si--Cu film layer is transfigured into a tall metallic film portion and a short metallic film portion.