Abstract: A method for manufacturing a semiconductor device, including the following steps. A plurality of first vias are formed in a first dielectric layer in a memory cell region and a peripheral region. A surface treatment is performed on the plurality of first vias to form a plurality of sacrificial layers. The plurality of sacrificial layers are removed to form a plurality of recesses. A plurality of protective layers are formed in the plurality of recesses. A memory device is formed on the first dielectric layer in the memory cell region. A second dielectric layer is formed on the memory device and on the first dielectric layer. A plurality of second vias is formed in the second dielectric layer in the memory cell region and the peripheral region to electrically connect the memory device in the memory cell region and the first vias in the peripheral region, respectively.

Abstract: A method of forming a memory device includes forming a first electrode; forming a resistive switching layer over the first electrode; forming a dielectric layer over the resistive switching layer; forming a first opening in the dielectric layer, wherein the first opening passes through the dielectric layer and exposes the resistive switching layer; forming a first trench in the dielectric layer, wherein the first trench is directly above the first opening; and forming a second electrode having a step shape in the first opening and the first trench.

Abstract: A method for manufacturing a semiconductor device, including the following steps. A plurality of first vias are formed in a first dielectric layer in a memory cell region and a peripheral region. A surface treatment is performed on the plurality of first vias to form a plurality of sacrificial layers. The plurality of sacrificial layers are removed to form a plurality of recesses. A plurality of protective layers are formed in the plurality of recesses. A memory device is formed on the first dielectric layer in the memory cell region. A second dielectric layer is formed on the memory device and on the first dielectric layer. A plurality of second vias is formed in the second dielectric layer in the memory cell region and the peripheral region to electrically connect the memory device in the memory cell region and the first vias in the peripheral region, respectively.

Abstract: A method of forming a memory device includes forming a first electrode; forming a resistive switching layer over the first electrode; forming a dielectric layer over the resistive switching layer; forming a first opening in the dielectric layer, wherein the first opening passes through the dielectric layer and exposes the resistive switching layer; forming a first trench in the dielectric layer, wherein the first trench is directly above the first opening; and forming a second electrode having a step shape in the first opening and the first trench.

Abstract: A resistive random access memory (RRAM) including a substrate, a conductive layer, a resistive switching layer, a copper-containing oxide layer, and an electron supply layer is provided. The conductive layer is disposed on the substrate. The resistive switching layer is disposed on the conductive layer. The copper-containing oxide layer is disposed on the resistive switching layer. The electron supply layer is disposed on the copper-containing oxide layer.