Patents by Inventor Shunji Nakata

Shunji Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8039864
    Abstract: A high luminance semiconductor light emitting device and a fabrication method for such semiconductor light emitting device are provided by forming a metallic reflecting layer using a non-transparent semiconductor substrate.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: October 18, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Shunji Nakata
  • Publication number: 20100133505
    Abstract: A high luminance semiconductor light emitting device and a fabrication method for such semiconductor light emitting device are provided by forming a metallic reflecting layer using a non-transparent semiconductor substrate.
    Type: Application
    Filed: June 6, 2008
    Publication date: June 3, 2010
    Applicant: ROHM CO., LTD
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Shunji Nakata
  • Publication number: 20100133506
    Abstract: Provided are a nitride semiconductor light emitting element having a nitride semiconductor layered on an AlN buffer layer with improved qualities such as crystal quality and with improved light emission output, and a method of manufacturing a nitride semiconductor. An AlN buffer layer (2) is formed on a sapphire substrate (1), and nitride semiconductors of an n-type AlGaN layer (3), an InGaN/GaN active layer (4) and a p-type GaN layer (5) are layered in sequence on the buffer layer (2). An n-electrode (7) is formed on a surface of the n-type AlGaN layer (3), and a p-electrode (6) is formed on the p-type GaN layer (5). The n-type AlGaN layer (3) serves as a cladding layer for confining light and carriers. The AlN buffer layer (2) is manufactured by alternately supplying an Al material and an N material at a growing temperature of 900° C. or higher.
    Type: Application
    Filed: June 13, 2008
    Publication date: June 3, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yasuo Nakanishi, Shunji Nakata, Tetsuya Fujiwara, Kazuhiko Senda, Masayuki Sonobe
  • Publication number: 20100117055
    Abstract: To provide a semiconductor light-emitting device capable of sufficiently emitting lights of different colors. A semiconductor light-emitting device (1) includes a substrate (2) and a semiconductor layer (3) formed on the substrate (2). The semiconductor layer (3) has a buffer layer (11), an n-type semiconductor layer (12), a light-emitting layer (13), and a p-type semiconductor layer (14) stacked in this order from a substrate (2)-side. The light-emitting layer (13) has an MQW structure in which a plurality of well layers (21n) and a plurality of barrier layers (22m) are alternately stacked. A well layer (211) closest to the p-type semiconductor layer (14) emits a blue light having a wavelength of about 420 nm to about 470 nm. The well layer (211) is made of an undoped Inx1Ga1-x1N (0.05?X1<0.2). A well layer (212) second closest to the p-type semiconductor layer (14) emits a green light having a wavelength of about 520 nm to about 650 nm. The well layer 212 is made of undoped Inx2Ga1-x2N (0.2?X2?0.3).
    Type: Application
    Filed: May 12, 2008
    Publication date: May 13, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yasuo Nakanishi, Shunji Nakata
  • Publication number: 20100102341
    Abstract: A semiconductor light emitting device includes: a transparent substrate including a first principal surface and a second principal surface opposite with the first principal surface, in which side surfaces between the first principal surface and the second principal surface are rough surfaces; and a semiconductor light emitting element that is arranged on the first principal surface of the transparent substrate and is composed by stacking nitride semiconductors on each other.
    Type: Application
    Filed: June 3, 2008
    Publication date: April 29, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Kazuaki Tsutsumi, Yohei Ito, Yasuo Nakanishi, Shunji Nakata
  • Publication number: 20080210958
    Abstract: A semiconductor white light emitting device including: a semiconductor light emitting element having green and blue light emitting layers containing In; and a phosphor capable of emitting red light.
    Type: Application
    Filed: November 26, 2007
    Publication date: September 4, 2008
    Applicant: ROHM CO., LTD.
    Inventors: Kazuhiko Senda, Shunji Nakata
  • Publication number: 20080149950
    Abstract: An optical communication semiconductor device including: a first light emitting layer composed of a semiconductor; and a second light emitting layer which is laid on or above the first light emitting layer and composed of a semiconductor capable of emitting light having a emission peak at a wavelength different from that of light emitted by the first light emitting layer.
    Type: Application
    Filed: November 26, 2007
    Publication date: June 26, 2008
    Applicant: ROHM CO., LTD.
    Inventors: Kazuhiko Senda, Shunji Nakata
  • Patent number: 7030672
    Abstract: An adiabatic charging register circuit comprising a plurality of n-channel MOSFET's and a plurality of p-channel MOSFET's, is operated by a clock signal which has a gradually rising and a gradually falling waveform generated by using a charge recycle power source in which charge supplied to a load is at least partially collected to said charge recycle power source, and following inequality is satisfied; |VTN|+|VTP|?VDD where VTN is threshold of an n-channel MOSFET, VTP is threshold of a p-channel MOSFET, and VDD is output voltage of said charge recycle power source.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: April 18, 2006
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shunji Nakata, Yuuichi Kado
  • Publication number: 20040189365
    Abstract: An adiabatic charging register circuit comprising a plurality of n-channel MOSFET's and a plurality of p-channel MOSFET's, is operated by a clock signal which has a gradually rising and a gradually falling waveform generated by using a charge recycle power source in which charge supplied to a load is at least partially collected to said charge recycle power source, and following inequality is satisfied;
    Type: Application
    Filed: April 27, 2004
    Publication date: September 30, 2004
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shunji NAKATA, Yuuichi KADO
  • Patent number: 6788121
    Abstract: An adiabatic charging register circuit including a plurality of n-channel MOSFET's and plurality of p-channel MOSFET's, is operated by a clock signal which has a gradually rising and an gradually falling waveform generated by using a charge recycle power source in which charge supplied to a load is at lease partially collected to said charge recycle power source, and following inequality is satisfied; |VTN|+|VTP|≧VDD wherein VTN is threshold of an n-channel MOSFET, VTP is threshold of a p-channel MOSFET, and VDD is output voltage of said charge recycle power source.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: September 7, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shunji Nakata, Yuuichi Kado
  • Publication number: 20020181790
    Abstract: Each of a transmit side and a receive side has a basic frame memory which stores a basic frame, and an accumulated frame memory which stores a predicted P-picture. An I-picture is inter-frame compressed by taking difference between the current input I-picture and a basic frame stored in the basic frame memory. An input P-picture is inter-frame compressed by taking difference between the current input P-picture and a prediction frame which is stored in the accumulated frame memory storing a sum of said prediction frame and a de-compressed difference signal. An I-picture which does not take difference from a previous frame but a fixed basic frame is inserted in every predetermined P-pictures so that a compression errors of P-pictures is not accumulated large. An I-picture may be substituted by a plurality of intra-slices which shifts one by one so that they cover a whole frame. The difference for compression may be taken either for each frame, or for each macroblock in a frame.
    Type: Application
    Filed: May 29, 2002
    Publication date: December 5, 2002
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventor: Shunji Nakata
  • Patent number: 6426518
    Abstract: A light emitting layer forming portion (9) comprising InGaAlP based compound semiconductor and forming a light emitting layer is deposited on an n-type GaAs substrate (1), a p-type current dispersion layer (5) comprising AlGaAs based compound semiconductor is provided on a surface of the light emitting layer forming portion (9), a p-side electrode (7) is provided on a portion of a surface of the current dispersion layer (5) through a contact layer (6) comprising p-type GaAs, and an n-side electrode (8) is provided on a back. surface of the GaAs substrate (1). Vickers' hardness of the current dispersion layer (5) comprising AlGaAs is 700 or higher. As a result, at the time of handling for mounting, or wire bonding, a fracture or a crack is not generated in the LED chip, and it is possible to enhance the yield of assembling steps.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: July 30, 2002
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Yukio Matsumoto, Shunji Nakata
  • Publication number: 20020000862
    Abstract: An adiabatic charging register circuit comprising a plurality of n-channel MOSFET's and a plurality of p-channel MOSFET's, is operated by a clock signal which has a gradually rising and a gradually falling waveform generated by using a charge recycle power source in which charge supplied to a load is at least partially collected to said charge recycle power source, and following inequality is satisfied;
    Type: Application
    Filed: June 4, 2001
    Publication date: January 3, 2002
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Shunji Nakata, Yuuichi Kado
  • Patent number: 6329216
    Abstract: A semiconductor light emitting device has a light emitting layer forming portion formed on the substrate and having an n-type layer and a p-type layer to provide a light emitting layer. A window layer is formed on a surface side of the light emitting layer forming portion. The window layer is formed of AlyGal−yAs (0.6≦y≦0.8) auto-doped in a carrier concentration of 5×1018-3×1019 cm−3. The resulting semiconductor light emitting device is free of degradation in crystallinity due to p-type impurity doping, thereby provide a high light emitting efficiency and brightness without encountering device degradation or damage.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: December 11, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Matsumoto, Shunji Nakata, Yukio Shakuda
  • Patent number: 6265324
    Abstract: A mask 11 for vapor deposition is made of glass. Through-holes 15 are formed in the glass mask 11 so that they make a prescribed pattern on the surface of a semiconductor substrate 4. The peripheral wall of the through-hole is tapered so that the opening face 15b from which evaporated atoms are introduced is larger than the opening face 15a facing the deposition surface of the semiconductor substrate. The evaporated metal atoms having flied aslant toward the opening face 15b from which the evaporated atoms are introduced can pass through the through-hole 14 so that the evaporated metal atoms are deposited on the deposition surface of the semiconductor substrate. A desired thin film pattern inclusive of an electrode pattern can be easily formed on the surface of a semiconductor substrate, thereby improving the production yield of a semiconductor device.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: July 24, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yasuo Miyano, Koutarou Ogura
  • Patent number: 6258619
    Abstract: A semiconductor light emitting device includes a substrate, an n-type layer formed of gallium-nitride based compound semiconductor formed on the substrate, and a p-type layer formed of gallium-nitride based compound semiconductor formed on the substrate. Semiconductor overlying layers are constituted by the n-type layer and the p-type layer on the substrate. A light emitting layer is formed together with the n-type and p-type layers in the semiconductor overlying layers to emit light. At least one of the n-type layer and the p-type layer is formed by three or more overlying sublayers including a sublayer of AlyGa1-yN (0<y≦0.5) and a sublayer of AluGa1-uN (0≦u<y). With this structure, the semiconductor light emitting device is almost free from lattice mismatch to thereby enhance electron mobility and hence light emission efficiency even where the overlying semiconductor layers are different in lattice constant from the substrate.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 10, 2001
    Assignee: Rohm LTD
    Inventors: Masayuki Sonobe, Shunji Nakata, Yukio Shakuda, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6242951
    Abstract: An adiabatic charging logic circuit includes a logic circuit and a power supply section. The logic circuit is constituted by a plurality of logic elements. The power supply section supplies power to the logic circuit to cause the logic circuit to perform logic processing after an input signal is supplied to the gate of each of the logic elements, and stops supply of the power before a new input signal is supplied to the gate of each of the logic elements after completion of the logic processing.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: June 5, 2001
    Inventors: Shunji Nakata, Takakuni Douseki, Mitsuru Harada, Ken Takeya
  • Patent number: 6236067
    Abstract: A semiconductor light emitting device is disclosed. An emitting layer forming portion for forming an emitting layer made of a compound semiconductor of AlGaInP group or AlGaAs group including a n-type layer, an active layer and a p-type layer laid one on another is formed on a GaAs substrate. Further, a current diffusion layer of GaP is formed on the front surface of the emitting layer forming portion. The p-type layer between the active layer and the current diffusion layer is formed to the thickness of not less than about 2 &mgr;m, or the current diffusion layer is formed to the thickness of about 3 to 7 &mgr;m. As a result, the semiconductor light emitting device of a high luminance is thus realized, in which the distortion due to the lattice mismatch has no effect on the emitting layer.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: May 22, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Yukio Matsumoto, Shunji Nakata
  • Patent number: 6194241
    Abstract: A semiconductor layered portion is formed of a gallium-nitride semiconductor overlying a substrate and having an n-type layer and a p-type layer to form a light emitting layer having a pn junction or a doublehetero junction. A gradient layer is provided at an interfacial portion between an lower layer and an upper layer of the semiconductor layered portion, wherein the gradient layer has a composition varied from a composition from said lower layer to a composition of the upper layer. With this structure, a semiconductor light emitting device which is excellent in light emitting efficiency is provided by reducing crystal lattice mismatch between semiconductor layers formed different in lattice constant on a substrate.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: February 27, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Norikazu Itoh
  • Patent number: 6191437
    Abstract: An n-type layer (3) and a p-type layer (5) which are made of a gallium nitride based compound semiconductor are provided on a substrate (1) so that a light emitting layer forming portion (10) for forming a light emitting layer is provided. A gallium nitride based compound semiconductor layer containing oxygen is used for at least one layer of the light emitting layer forming portion (10). In the case where a buffer layer (2) made of the gallium nitride based compound semiconductor or aluminum nitride is provided between the substrate (1) and the light emitting layer forming portion (10), the buffer layer (2) and/or at least one layer of the light emitting layer forming portion (10) may contain oxygen. By such a structure, crystal defects of the semiconductor layer of the light emitting layer forming portion (10) can be decreased and a luminance can highly be enhanced. Thus, it is possible to obtain a blue color type semiconductor light emitting device having a high luminance.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: February 20, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Masayuki Sonobe, Shunji Nakata, Tsuyoshi Tsutsui, Norikazu Itoh