Abstract: A semiconductor module includes a plurality of semiconductor memory devices, a registered buffer, a PLL circuit and a test mode entry circuit. The test mode entry circuit receives a signal MRS, a bank address signal and an address signal from the registered buffer, directly and externally receives a signal formed of a high voltage level higher than the voltage level in a normal operating range, generates a deactivating signal for deactivating the PLL circuit and a test mode shift signal formed of the high voltage level, applying the deactivating signal to the PLL circuit, and applying the test mode shift signal to the plurality of semiconductor memory devices. Consequently, the plurality of semiconductor memory devices included in the module can be shifted to the test mode in the modular state.

Abstract: A semiconductor module includes a plurality of semiconductor memory devices, a registered buffer, a PLL circuit and a test mode entry circuit. The test mode entry circuit receives a signal MRS, a bank address signal and an address signal from the registered buffer, directly and externally receives a signal formed of a high voltage level higher than the voltage level in a normal operating range, generates a deactivating signal for deactivating the PLL circuit and a test mode shift signal formed of the high voltage level, applying the deactivating signal to the PLL circuit, and applying the test mode shift signal to the plurality of semiconductor memory devices. Consequently, the plurality of semiconductor memory devices included in the module can be shifted to the test mode in the modular state.

Abstract: A test mode signal generating circuit is provided with a test setting control unit for detecting that an external power supply potential exceeds a predetermined potential. When external power supply potential is a high potential beyond a predetermined standard range, a test mode can be set without setting a signal for test mode entry to be a high potential. Therefore, a semiconductor device which can be set in a test mode by an address key in the case of conducting a test by applying a high power supply voltage can be provided.