Patents by Inventor Shunsuke Honda

Shunsuke Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11975511
    Abstract: A decrease in the adhesiveness of an in-mold label can be suppressed even when a silicone transferred from the protective layer side to the heat-sealable resin layer side. An in-mold label includes a substrate layer, a printed layer provided on one surface of the substrate layer, and a heat-sealable resin layer provided on the other surface of the substrate layer, a protective layer containing a silicone is provided on an outermost surface on one surface side of the substrate layer on which the printed layer is provided, and an adhesive strength decrease-inhibiting layer containing a (meth)acrylic acid based copolymer having a polar group is provided on an outermost surface on the other surface side of the substrate layer on which the heat-sealable resin layer is provided.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: May 7, 2024
    Assignee: YUPO CORPORATION
    Inventors: Shunsuke Honda, Takuya Ikarashi
  • Patent number: 11971633
    Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: April 30, 2024
    Assignees: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, SONY GROUP CORPORATION
    Inventors: Takashi Sakairi, Tomoaki Honda, Tsuyoshi Okazaki, Keiichi Maeda, Chiho Araki, Katsunori Dai, Shunsuke Narui, Kunihiko Hikichi, Kouta Fukumoto, Toshiaki Okada, Takuma Matsuno, Yuu Kawaguchi, Yuuji Adachi, Koichi Amari, Hideki Kawaguchi, Seiya Haraguchi, Takayoshi Masaki, Takuya Fujino, Tadayuki Dofuku, Yosuke Takita, Kazuhiro Tamura, Atsushi Tanaka
  • Publication number: 20210394495
    Abstract: A decrease in the adhesiveness of an in-mold label can be suppressed even when a silicone transferred from the protective layer side to the heat-sealable resin layer side. An in-mold label includes a substrate layer, a printed layer provided on one surface of the substrate layer, and a heat-sealable resin layer provided on the other surface of the substrate layer, a protective layer containing a silicone is provided on an outermost surface on one surface side of the substrate layer on which the printed layer is provided, and an adhesive strength decrease-inhibiting layer containing a (meth)acrylic acid based copolymer having a polar group is provided on an outermost surface on the other surface side of the substrate layer on which the heat-sealable resin layer is provided.
    Type: Application
    Filed: September 26, 2019
    Publication date: December 23, 2021
    Applicant: YUPO CORPORATION
    Inventors: Shunsuke HONDA, Takuya IKARASHI
  • Publication number: 20210129410
    Abstract: A laminate including at least a heat-sensitive adhesive layer, a substrate layer, and a protective layer in this order, wherein the substrate layer has a thermoplastic resin film, the heat-sensitive adhesive layer contains a higher fatty acid amide, and the protective layer contains a silicone-based release agent. An in-mold label comprising this laminate. A molded body obtained by affixing this in-mold label. An in-mold label in the form of a roll obtained by winding this in-mold label. This invention provides an in-mold label that is less susceptible to dirt and scratches, excellent in decorativeness and visibility, less likely to cause friction when the labels are stacked on each other, and easy to handle, and has strong adhesive strength to a molded body.
    Type: Application
    Filed: March 29, 2019
    Publication date: May 6, 2021
    Applicant: YUPO Corporation
    Inventors: Yuta IWASAWA, Shunsuke HONDA, Masahiko UENO
  • Patent number: 10717223
    Abstract: A thermoplastic resin film of the present invention contains at least a base layer containing a thermoplastic resin and a heat seal layer containing a thermoplastic resin; a melting point of the thermoplastic resin contained in the heat seal layer is lower than a melting point of the thermoplastic resin of the base layer; a core roughness depth Rk of a surface of the heat seal layer being from 1.2 to 9.0 ?m; and a ratio Rzjis/Rk of a ten point height of roughness profile Rzjis to a core roughness depth Rk of the surface of the heat seal layer measured in accordance with JIS B0601:2013 Appendix 1 being from 2.0 to 9.0.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: July 21, 2020
    Assignee: YUPO CORPORATION
    Inventors: Yuichi Iwase, Shunsuke Honda, Takahiko Ueda
  • Publication number: 20180036934
    Abstract: A thermoplastic resin film of the present invention contains at least a base layer containing a thermoplastic resin and a heat seal layer containing a thermoplastic resin; a melting point of the thermoplastic resin contained in the heat seal layer is lower than a melting point of the thermoplastic resin of the base layer; a core roughness depth Rk of a surface of the heat seal layer being from 1.2 to 9.0 ?m; and a ratio Rzjis/Rk of a ten point height of roughness profile Rzjis to a core roughness depth Rk of the surface of the heat seal layer measured in accordance with JIS B0601:2013 Appendix 1 being from 2.0 to 9.0.
    Type: Application
    Filed: February 12, 2016
    Publication date: February 8, 2018
    Applicant: YUPO CORPORATION
    Inventors: Yuichi IWASE, Shunsuke HONDA, Takahiko UEDA
  • Patent number: 4483009
    Abstract: A transversal equalizer has a transversal filter which performs a convolution of an unequalized signal and a tap weight. In the automatic equalization mode, the tap weight is updated according to the result of a correlation of the unequalized signal and an error signal, and the updated tap weight is applied to the transversal filter. In the fixed equalization mode, a fixed tap weight stored in a memory is applied to the transversal filter.
    Type: Grant
    Filed: September 24, 1981
    Date of Patent: November 13, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Shunsuke Honda, Hideo Suzuki, Haruki Yahata
  • Patent number: 4475085
    Abstract: A clock synchronization signal generating circuit includes a clock synchronizing circuit having a scale variable counter for counting a source clock signal from a source clock generator and a control circuit for controlling the scale of counter responsive to the phase difference between an input clock signal supplied from a digital operation system and an output signal from the scale variable counter, and a clock circuit including a counter for counting in n-scale mode a source clock signal from the source clock generator. The scale variable counter is selectively set to (n-1)-, n- or (n+1)-scale mode responsive to the control signal from the control circuit to generate an output signal which is clock-synchronized with the input clock signal.
    Type: Grant
    Filed: September 25, 1981
    Date of Patent: October 2, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Haruki Yahata, Hideo Suzuki, Shunsuke Honda
  • Patent number: 4159527
    Abstract: A periodic function wave generator is provided in a digital phase synchronizing circuit which comprises a memory circuit for storing the values of n phases obtained by equally dividing one period of a sine wave by 4n and each having a phase .theta.=90.degree./n(i+0.5), where n represents an integer and i is an integer of from 0 to n-1, a circuit for designating a predetermined one of these phases in one period, a circuit for converting an address read out of the memory circuit into one of the n phases in accordance with one of the ranges of 0.degree. to 90.degree., 90.degree. to 180.degree., 180.degree. to 270.degree. and 270.degree. to 360.degree. and a circuit for inverting the sign of the output of the memory circuit in accordance with the particular range in which the designated phase falls.
    Type: Grant
    Filed: January 19, 1978
    Date of Patent: June 26, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Haruki Yahata, Shunsuke Honda, Tadamichi Kawasaki
  • Patent number: 4149258
    Abstract: A digital filter system comprising a plurality of digital filters having respective counters operated by the same clock signal, at least one of these digital filters including an operation control section having a counter to count the clock signal and be cleared with a clear signal and a circuit to produce a control signal according to the content of the aforesaid counter, an ROM to provide predetermined coefficients according to the output of the arithmetic control section, an arithmetic section to carry out predetermined arithmetic operations with the above predetermined coefficients under the control of the control signal received from the arithmetic control section, a delay memory section, a switching device controlled for switching to execute the arithmetic operations under the control of the control signal received at the time of execution of the operations, and a circuit to produce a synchronizing signal at the time of the end of the operations in the aforesaid filter, said synchronizing signal being s
    Type: Grant
    Filed: December 19, 1977
    Date of Patent: April 10, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Haruki Yahata, Shunsuke Honda, Tadamichi Kawasaki
  • Patent number: 4145663
    Abstract: The detector is provided with an input control circuit supplied with a first input for extracting a carrier wave from a modulated wave and a second input for demodulating the modulated wave and controlled to produce the first and second inputs on the time division basis, a reference wave generating circuit which produces a sine wave or a cosine wave as a reference wave and produces amplitude values corresponding to designated phases, and a time division multiplying circuit which multiplies the outputs of the input control circuit with the amplitude values on the time division basis for producing the demodulated signal.
    Type: Grant
    Filed: January 17, 1978
    Date of Patent: March 20, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Haruki Yahata, Shunsuke Honda, Tadamichi Kawasaki