Abstract: Rotation of an image bearing member is started and stopped in a contact state between the image bearing member and a developing member. During post-rotation operation, a controller ends application of a charging voltage after changing the charging voltage stepwise to first and second charging voltages. The controller ends application of a developing voltage after changing the developing voltage stepwise at a developing position to first and second developing voltage in synchronism with the first and second charging voltages. A potential difference between each of surface potentials of first and second regions and an associated one of the first and second developing voltages is maintained within a predetermined range. The controller carries out control so that an absolute value of the surface potential of at least one of the first and second regions is made small by passing a current under application of a transfer voltage.

Abstract: An image processing device includes: a control unit configured to acquire a cross-sectional image obtained using a sensor configured to move in a lumen of a biological tissue for each position in a movement direction of the sensor, analyze the acquired cross-sectional image to calculate a centroid position of a cross section of the lumen in the cross-sectional image, and execute smoothing on a calculation result obtained for a plurality of positions in the movement direction of the sensor, and evaluate a difference between the calculated centroid position and a centroid position obtained as a result of the smoothing for each position in the movement direction of the sensor, thereby deriving a pulsation score representing expansion and contraction of the lumen in the acquired cross-sectional image by a numerical value.

Abstract: A semiconductor device capable of suppressing the calorific value at the central portion of a wire bonding area is provided. A semiconductor device includes a plurality of IGBT cells in a cell area. An emitter electrode serves as a current path when a plurality of IGBT cells are in conductive state, and is formed to cover a plurality of IGBT cells. A wire is bonded to the emitter electrode. A dummy cell which does not perform a bipolar operation, is formed at least below a central portion of a wire bonding area which is an area at which the wire and the emitter electrode are bonded.

Abstract: A semiconductor device capable of suppressing the calorific value at the central portion of a wire bonding area is provided. A semiconductor device includes a plurality of IGBT cells in a cell area. An emitter electrode serves as a current path when a plurality of IGBT cells are in conductive state, and is formed to cover a plurality of IGBT cells. A wire is bonded to the emitter electrode. A dummy cell which does not perform a bipolar operation, is formed at least below a central portion of a wire bonding area which is an area at which the wire and the emitter electrode are bonded.

Abstract: A semiconductor device includes a semiconductor substrate including a collector layer of a first conductivity type and a drift layer of a second conductivity type in contact with said collector layer, said drift layer receiving a supply of carriers from said collector layer. The semiconductor device further includes a lattice defect formed to penetrate through said semiconductor substrate and enclose a predetermined portion of said semiconductor substrate, a sense emitter electrode formed on the top surface of said predetermined portion, and a collector electrode formed on the bottom surface of said predetermined portion.

Abstract: A semiconductor wafer having IGBT elements and transistors formed on a surface thereof is prepared. Electron beams are emitted all over the surface of the semiconductor wafer. Recombination centers are formed in the IGBT elements and the transistors. ON voltages of the transistors are measured by a measurement device, and lifetimes defined in the IGBT elements and the transistors are recovered by a prescribed annealing treatment. When the lifetimes are recovered, a control device controls an annealing treatment amount in the annealing treatment based on the measured ON voltages of the transistors such that ON voltages of the IGBT elements are each equal to a desired ON voltage. Variations in the ON voltages of a plurality of IGBT elements obtained from the semiconductor wafer are reduced.

Abstract: A semiconductor wafer having IGBT elements and transistors formed on a surface thereof is prepared. Electron beams are emitted all over the surface of the semiconductor wafer. Recombination centers are formed in the IGBT elements and the transistors. ON voltages of the transistors are measured by a measurement device, and lifetimes defined in the IGBT elements and the transistors are recovered by a prescribed annealing treatment. When the lifetimes are recovered, a control device controls an annealing treatment amount in the annealing treatment based on the measured ON voltages of the transistors such that ON voltages of the IGBT elements are each equal to a desired ON voltage. Variations in the ON voltages of a plurality of IGBT elements obtained from the semiconductor wafer are reduced.

Abstract: A charge storage layer of first conductive type is formed on the first principal surface of a semiconductor substrate. A base layer of second conductive type is formed on the charge storage layer. Each trench formed through the base layer and the charge storage layer is lined with an insulating film and filled with a trench gate electrode. Dummy trenches are formed on both sides of each trench. Source layers of first conductive type are selectively formed in the surface of the base layer and in contact with the sidewalls of the trenches. The source layers are spaced apart from each other and arranged in the longitudinal direction of the trenches. A contact layer of second conductive type is formed in the surface of the base layer and between each two adjacent source layers arranged in the longitudinal direction of the trenches. A collector layer of second conductive type is formed on the second principal surface of the semiconductor substrate.

Abstract: A charge storage layer of first conductive type is formed on the first principal surface of a semiconductor substrate. A base layer of second conductive type is formed on the charge storage layer. Each trench formed through the base layer and the charge storage layer is lined with an insulating film and filled with a trench gate electrode. Dummy trenches are formed on both sides of each trench. Source layers of first conductive type are selectively formed in the surface of the base layer and in contact with the sidewalls of the trenches. The source layers are spaced apart from each other and arranged in the longitudinal direction of the trenches. A contact layer of second conductive type is formed in the surface of the base layer and between each two adjacent source layers arranged in the longitudinal direction of the trenches. A collector layer of second conductive type is formed on the second principal surface of the semiconductor substrate.