Abstract: The present disclosure provides a movable electric device. The movable electric device includes a movable device body and a contact detection electrode. The movable device body has an electric drive means. The contact detection electrode is mounted on the movable device body. When the contact detection electrode _contacts diffusible dirt, a resistance, capacitance or impedance of the contact detection electrode varies.

Abstract: A class of five-membered fused with six-membered heterocyclic compounds represented by formula I and a pharmaceutical composition, preparation, and an application thereof are disclosed. These compounds have TRK kinase inhibitory activity and can treat diseases related to TRK dysfunction.

Abstract: Provided are a preparation and applications of a six-membered fused with six-membered heterocyclic compound, specifically, provided in the present invention is a compound as represented by formula I as follows, where the definitions of the groups are as described in the description. The compound has TRK kinase inhibiting activity and can serve as a pharmaceutical composition for treating TRK dysfunction-related diseases.

Abstract: Provided is a multifunctional viscose fiber comprising viscose fibers, graphene and nanosilver, wherein the nanosilver is loaded on the graphene in situ. Provided is a method for preparing multifunctional viscose fibers including: a) dispersing graphene in an aqueous solution to obtain a graphene dispersion solution, b) dissolving a silver salt into the graphene dispersion solution, and adding a reducing agent to perform a reduction reaction to obtain a nanosilver-loaded graphene dispersion solution, and c) uniformly mixing the nanosilver-loaded graphene dispersion solution with a viscose solution, and performing spinning to obtain the multifunctional viscose fibers. Experimental results show that as compared to viscose fibers with no nanosilver-loaded graphene added, the multifunctional viscose fibers have a far infrared temperature increase performance increased by not less than 100%, an ultraviolet protecting coefficient increased by not less than 70%, and an antibacterial activity reaching 99.

Abstract: Provided is a multifunctional viscose fiber comprising viscose fibers, graphene and nanosilver, wherein the nanosilver is loaded on the graphene in situ. Provided is a method for preparing multifunctional viscose fibers including: a) dispersing graphene in an aqueous solution to obtain a graphene dispersion solution, b) dissolving a silver salt into the graphene dispersion solution, and adding a reducing agent to perform a reduction reaction to obtain a nanosilver-loaded graphene dispersion solution, and c) uniformly mixing the nanosilver-loaded graphene dispersion solution with a viscose solution, and performing spinning to obtain the multifunctional viscose fibers. Experimental results show that as compared to viscose fibers with no nanosilver-loaded graphene added, the multifunctional viscose fibers have a far infrared temperature increase performance increased by not less than 100%, an ultraviolet protecting coefficient increased by not less than 70%, and an antibacterial activity reaching 99.

Abstract: A protection circuit including a multi-gate high electron mobility transistor (HEMT), a forward conduction control block, and a reverse conduction control block is provided between a first terminal and a second terminal. The multi-gate HEMT includes an explicit drain/source, a first depletion-mode (D-mode) gate, a first enhancement-mode (E-mode) gate, a second E-mode gate, a second D-mode gate, and an explicit source/drain. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward conduction control block turns on the second E-mode gate when a voltage difference between the first and second terminals is greater than a forward conduction trigger voltage, and the reverse conduction control block turns on the first E-mode gate when the voltage difference is more negative than a reverse conduction trigger voltage.

Abstract: Compound semiconductor lateral PNP bipolar transistors are fabricated based on processes traditionally used for formation of compound semiconductor NPN heterojunction bipolar transistors and hence such PNP bipolar transistors can be fabricated inexpensively using existing fabrication technologies. In particular, GaAs-based lateral PNP bipolar transistors are fabricated using GaAs-based NPN heterojunction bipolar transistor fabrication processes.

Abstract: A switching device for heterojunction integrated circuits is disclosed. According to one aspect, the switching device is configured to protect a circuit from an electro-static discharge (ESD) event. The switching device includes a second base contact region that is configured to be electrically floating, a first base contact region and a collector contact region that are coupled to a first input terminal of the switching device, and an emitter contact region that is coupled to a second input terminal of the switching device. Due in part to capacitive coupling between the first base contact region and the second base contact region, the switching device exhibits a low transient trigger voltage and a fast response to ESD events. Further, the switching device exhibits a high DC trigger voltage (for example, greater than 20V), while maintaining relatively low leakage current during operation (for example, less than about 0.5 ?A at 20V DC.

Abstract: A protection clamp is provided between a first terminal and a second terminal, and includes a multi-gate high electron mobility transistor (HEMT), a current limiting circuit, and a forward trigger control circuit. The multi-gate HEMT includes a drain/source, a source/drain, a first depletion-mode (D-mode) gate, a second D-mode gate, and an enhancement-mode (E-mode) gate disposed between the first and second D-mode gates. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward trigger control and the current limiting circuits are coupled between the E-mode gate and the first and second terminals, respectively. The forward trigger control circuit provides an activation voltage to the E-mode gate when a voltage of the first terminal exceeds a voltage of the second terminal by a forward trigger voltage.

Abstract: Compound semiconductor lateral PNP bipolar transistors are fabricated based on processes traditionally used for formation of compound semiconductor NPN heterojunction bipolar transistors and hence such PNP bipolar transistors can be fabricated inexpensively using existing fabrication technologies. In particular, GaAs-based lateral PNP bipolar transistors are fabricated using GaAs-based NPN heterojunction bipolar transistor fabrication processes.

Abstract: A protection circuit including a multi-gate high electron mobility transistor (HEMT), a forward conduction control block, and a reverse conduction control block is provided between a first terminal and a second terminal. The multi-gate HEMT includes an explicit drain/source, a first depletion-mode (D-mode) gate, a first enhancement-mode (E-mode) gate, a second E-mode gate, a second D-mode gate, and an explicit source/drain. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward conduction control block turns on the second E-mode gate when a voltage difference between the first and second terminals is greater than a forward conduction trigger voltage, and the reverse conduction control block turns on the first E-mode gate when the voltage difference is more negative than a reverse conduction trigger voltage.

Abstract: A protection clamp is provided between a first terminal and a second terminal, and includes a multi-gate high electron mobility transistor (HEMT), a current limiting circuit, and a forward trigger control circuit. The multi-gate HEMT includes a drain/source, a source/drain, a first depletion-mode (D-mode) gate, a second D-mode gate, and an enhancement-mode (E-mode) gate disposed between the first and second D-mode gates. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward trigger control and the current limiting circuits are coupled between the E-mode gate and the first and second terminals, respectively. The forward trigger control circuit provides an activation voltage to the E-mode gate when a voltage of the first terminal exceeds a voltage of the second terminal by a forward trigger voltage.

Abstract: A switching device for heterojunction integrated circuits is disclosed. According to one aspect, the switching device is configured to protect a circuit from an electro-static discharge (ESD) event. The switching device includes a second base contact region that is configured to be electrically floating, a first base contact region and a collector contact region that are coupled to a first input terminal of the switching device, and an emitter contact region that is coupled to a second input terminal of the switching device. Due in part to capacitive coupling between the first base contact region and the second base contact region, the switching device exhibits a low transient trigger voltage and a fast response to ESD events. Further, the switching device exhibits a high DC trigger voltage (for example, greater than 20V), while maintaining relatively low leakage current during operation (for example, less than about 0.5 ?A at 20V DC.

Abstract: A ?-type voltage-controlled variable attenuator is disclosed. The variable attenuator may include variably resistive components in the series and shunt arms. The variably resistive components may be implemented as field effect transistors. The shunt arms may be coupled to the series arm, and the variable attenuator may lack capacitors between the series arm and shunt arms. The series arm and shunt arms may display variable resistances which, in combination, operate to provide a variable level of attenuation of an input signal. The variable attenuator may provide any level of attenuation of an input signal over a wide frequency range. The variable attenuator may be implemented as an integrated circuit.

Abstract: A transistor cell is provided that includes transistors arranged to turn on for different voltages applied to a control terminal of the transistor cell. The transistor cell can include a first transistor having a gate, a source, and a drain, and a second transistor having a gate, a source, and a drain, wherein the source of the second transistor is coupled to the source of the first transistor, and the drain of the second transistor is coupled to the drain of the first transistor. The transistor cell can further include a first resistor coupled between the gate of the first transistor and the gate of the second transistor. A frequency mixer is also provided that includes at least one transistor cell.

Abstract: Circuits and methods for reducing distortion in an amplified signal are disclosed. The circuits and methods may use multiple single-ended gain stages to produce multiple amplified signals. The amplified signals may be processed in combination to produce a resulting output signal having little, or no, distortion. The circuits may be implemented on a single chip as integrated circuits.

Abstract: A ?-type voltage-controlled variable attenuator is disclosed. The variable attenuator may include variably resistive components in the series and shunt arms. The variably resistive components may be implemented as field effect transistors. The shunt arms may be coupled to the series arm, and the variable attenuator may lack capacitors between the series arm and shunt arms. The series arm and shunt arms may display variable resistances which, in combination, operate to provide a variable level of attenuation of an input signal. The variable attenuator may provide any level of attenuation of an input signal over a wide frequency range. The variable attenuator may be implemented as an integrated circuit.

Abstract: A transistor cell includes a first stage comprising a first transistor that is coupled to a RC filter arrangement. A second stage has a second transistor that is coupled to the first stage. The linearity of the transistor cell is improved by shifting the DC bias point so that the first stage is biased at a high quiescent current while the second stage is biased at a low quiescent current.

Abstract: Circuits and methods for reducing distortion in an amplified signal are disclosed. The circuits and methods may use multiple single-ended gain stages to produce multiple amplified signals. The amplified signals may be processed in combination to produce a resulting output signal having little, or no, distortion. The circuits may be implemented on a single chip as integrated circuits.

Abstract: A transistor cell is provided that includes transistors arranged to turn on for different voltages applied to a control terminal of the transistor cell. The transistor cell can include a first transistor having a gate, a source, and a drain, and a second transistor having a gate, a source, and a drain, wherein the source of the second transistor is coupled to the source of the first transistor, and the drain of the second transistor is coupled to the drain of the first transistor. The transistor cell can further include a first resistor coupled between the gate of the first transistor and the gate of the second transistor. A frequency mixer is also provided that includes at least one transistor cell.