Patents by Inventor Shuzo Mori

Shuzo Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9977705
    Abstract: According to an embodiment, a wireless communication device, which complies with plural communication methods, includes a storing circuit and a received data selection determining circuit. The storing circuit sequentially stores a first received data until the first received data reaches a predetermined data size. When it is assumed that a radio signal complies to a second communication method, a first period is longer than a second period. The first period is a period from a first time when a reception of the radio signal is started to a second time when the first received data with the data size is stored. The second period is a period from the first time to a time when a second reception start signal is detected. The received data selection determining circuit determines a selection of the first received data, when the second reception start signal is not detected at the second time.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 22, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuzo Mori
  • Publication number: 20160062813
    Abstract: According to an embodiment, a wireless communication device, which complies with plural communication methods, includes a storing circuit and a received data selection determining circuit. The storing circuit sequentially stores a first received data until the first received data reaches a predetermined data size. When it is assumed that a radio signal complies to a second communication method, a first period is longer than a second period. The first period is a period from a first time when a reception of the radio signal is started to a second time when the first received data with the data size is stored. The second period is a period from the first time to a time when a second reception start signal is detected. The received data selection determining circuit determines a selection of the first received data, when the second reception start signal is not detected at the second time.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 3, 2016
    Inventor: Shuzo Mori
  • Patent number: 9210537
    Abstract: According to an embodiment, a wireless communication device, which complies with plural communication methods, includes a storing circuit and a received data selection determining circuit. The storing circuit sequentially stores a first received data until the first received data reaches a predetermined data size. When it is assumed that a radio signal complies to a second communication method, a first period is longer than a second period. The first period is a period from a first time when a reception of the radio signal is started to a second time when the first received data with the data size is stored. The second period is a period from the first time to a time when a second reception start signal is detected. The received data selection determining circuit determines a selection of the first received data, when the second reception start signal is not detected at the second time.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuzo Mori
  • Patent number: 9137062
    Abstract: A wireless communication apparatus receives a wireless signal whose phases represent data values and determines the data values represented in the phases of the wireless signal. The apparatus includes a counter that updates a count value at a frequency higher than a frequency of the wireless signal, and resets the count value to an initial value when the phase of the wireless signal changes or when the counter overflows, a capture timing setting unit that sets a phase capture value in response to a resetting of the count value, and a phase capturing unit that captures the phase of the wireless signal when the count value reaches the phase capture value.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: September 15, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shuzo Mori
  • Publication number: 20150256966
    Abstract: According to an embodiment, a wireless communication device, which complies with plural communication methods, includes a storing circuit and a received data selection determining circuit. The storing circuit sequentially stores a first received data until the first received data reaches a predetermined data size. When it is assumed that a radio signal complies to a second communication method, a first period is longer than a second period. The first period is a period from a first time when a reception of the radio signal is started to a second time when the first received data with the data size is stored. The second period is a period from the first time to a time when a second reception start signal is detected. The received data selection determining circuit determines a selection of the first received data, when the second reception start signal is not detected at the second time.
    Type: Application
    Filed: August 22, 2014
    Publication date: September 10, 2015
    Inventor: Shuzo Mori
  • Publication number: 20150063515
    Abstract: A wireless communication apparatus receives a wireless signal whose phases represent data values and determines the data values represented in the phases of the wireless signal. The apparatus includes a counter that updates a count value at a frequency higher than a frequency of the wireless signal, and resets the count value to an initial value when the phase of the wireless signal changes or when the counter overflows, a capture timing setting unit that sets a phase capture value in response to a resetting of the count value, and a phase capturing unit that captures the phase of the wireless signal when the count value reaches the phase capture value.
    Type: Application
    Filed: February 26, 2014
    Publication date: March 5, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shuzo MORI
  • Publication number: 20120049942
    Abstract: According to an embodiment, a semiconductor device includes a functional circuit, an electric current measurement circuit and a control circuit. The functional circuit operates with a supplied electric power. The electric current measurement circuit is configured to measure an electric current based on the electric power. The control circuit is configured to control an operation of the functional circuit in accordance with operation information about the functional circuit and the measured electric current.
    Type: Application
    Filed: March 23, 2011
    Publication date: March 1, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shuzo Mori
  • Patent number: 6728164
    Abstract: A memory IC card including a card substrate, a semiconductor device mounted on the card substrate, which includes an CPU, a flash memory, a memory block and a flash memory rewrite circuit having a rewrite data control circuit that receives a rewrite instruction of the flash memory from the CPU to store data for a designated byte of a page for rewriting to the memory block, a page data control circuit that sends data of the page excepting the designated byte in the flash memory to the memory block to prepare new page data in the memory block and a data set control circuit that writes the new page data prepared in the memory block to the flash memory; outer terminals mounted on the card substrate; wirings provided on the card substrate to connect the outer terminals.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: April 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shuzo Mori
  • Publication number: 20030058733
    Abstract: A memory IC card including a card substrate, a semiconductor device mounted on the card substrate, which includes an CPU, a flash memory, a memory block and a flash memory rewrite circuit having a rewrite data control circuit that receives a rewrite instruction of the flash memory from the CPU to store data for a designated byte of a page for rewriting to the memory block, a page data control circuit that sends data of the page excepting the designated byte in the flash memory to the memory block to prepare new page data in the memory block and a data set control circuit that writes the new page data prepared in the memory block to the flash memory; outer terminals mounted on the card substrate; wirings provided on the card substrate to connect the outer terminals.
    Type: Application
    Filed: September 25, 2002
    Publication date: March 27, 2003
    Applicant: Kabushiki Kaisha Toshiba.
    Inventor: Shuzo Mori