Patents by Inventor Shyam S. Sivakumar

Shyam S. Sivakumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150381118
    Abstract: Methods and devices for eliminating a systematic imbalance and reducing variations in circuit parameters for a high gain amplifies. A bias generator having a copy of an actual amplifier branch and an already generated bias voltage can be added to the amplifier to generate a bias voltage for a final current source at a current summing node so as to eliminate systematic imbalance in the bias current. A high impedance node can be wired in the bias generator such that all devices in the bias generator are in saturation across, for example, PVT (Process, Voltage and Temperature) corners in order to minimize tracking errors. A degeneration transistor similar to a differential pair element can be split into two equal halves.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Shyam S. Sivakumar, Hiep T. Pham, Bradley Wright
  • Patent number: 8963577
    Abstract: A termination impedance apparatus includes a variable pull-up resistor, a variable pull-down resistor, and a small-signal calibration circuit. The variable pull-up resistor is coupled between a first power supply voltage terminal and an output terminal. The variable pull-down resistor is coupled between the output terminal and a second power supply voltage terminal. The small-signal calibration circuit is for calibrating the variable pull-up resistor and the variable pull-down resistor to achieve a desired small-signal impedance.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 24, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Warren R. Anderson, Shyam S. Sivakumar, Austen J. Hypher
  • Publication number: 20140325135
    Abstract: A termination impedance apparatus includes a variable pull-up resistor, a variable pull-down resistor, and a small-signal calibration circuit. The variable pull-up resistor is coupled between a first power supply voltage terminal and an output terminal. The variable pull-down resistor is coupled between the output terminal and a second power supply voltage terminal. The small-signal calibration circuit is for calibrating the variable pull-up resistor and the variable pull-down resistor to achieve a desired small-signal impedance.
    Type: Application
    Filed: April 24, 2013
    Publication date: October 30, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Warren R. Anderson, Shyam S. Sivakumar, Austen J. Hypher