Patents by Inventor Shyh-Chiang Shen

Shyh-Chiang Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178285
    Abstract: A high electron mobility transistor includes a semiconductor channel layer and a semiconductor barrier layer disposed on a substrate. A source electrode, a gate electrode and a drain electrode are disposed on the semiconductor channel layer. A patterned dielectric layer is disposed on the semiconductor barrier layer, and between the gate electrode and the drain electrode. A first field plate is extended continuously from a side of the patterned dielectric layer to the top surface thereof, and has a step in height. A first dielectric layer is disposed between the semiconductor barrier layer and the patterned dielectric layer. A second dielectric layer covers the patterned dielectric layer. The dielectric constant of the patterned dielectric layer is higher than that of the first dielectric layer and the second dielectric layer.
    Type: Application
    Filed: January 16, 2023
    Publication date: May 30, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yi-Wei Lien, Wei-Chih Cheng, Shyh-Chiang Shen, Hsin-Chang Tsai
  • Publication number: 20220406894
    Abstract: An exemplary embodiment of the present disclosure provides a method of fabricating a semiconductor device, comprising: providing a substrate, the substate comprising a base layer and two or more planar heteroepitaxial layers deposited on the base layer, the two or more heteroepitaxial layers comprising a first epitaxial layer having a first lattice constant and a second epitaxial layer having a second lattice constant different than the first lattice constant; etching the substrate to form one or more mesas; and depositing one or more non-planar overgrowth layers on the etched substrate.
    Type: Application
    Filed: June 9, 2022
    Publication date: December 22, 2022
    Inventors: Russell Dean Dupuis, Theeradetch Detchprohm, Frank Mehnke, Shyh-Chiang Shen
  • Patent number: 11195722
    Abstract: Methods for wet-etching semiconductor samples and devices fabricated from the same are disclosed. The methods can be for selectively wet-etching a semiconductor sample comprising selecting a liquid-phase solution such that when the semiconductor sample is etched with the liquid-phase solution, at least a portion of one of a first doped region or a second doped region is etched at a greater rate than at least a portion of the other of the first doped region or the second doped region; and wet-etching, with the liquid-phase solution, the at least a portion of one of the first doped region or the second doped region at a first etch rate and the at least a portion of the other of the first doped region or the second doped region at a second etch rate; wherein the first etch rate can be greater than the second etch rate.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 7, 2021
    Assignee: Georgia Tech Research Corporation
    Inventors: Shyh-Chiang Shen, Theeradetch DetchProhm, Russell Dean Dupuis, Young Jae Park, Oliver Moreno
  • Publication number: 20200381260
    Abstract: Methods for wet-etching semiconductor samples and devices fabricated from the same are disclosed. The methods can be for selectively wet-etching a semiconductor sample comprising selecting a liquid-phase solution such that when the semiconductor sample is etched with the liquid-phase solution, at least a portion of one of a first doped region or a second doped region is etched at a greater rate than at least a portion of the other of the first doped region or the second doped region; and wet-etching, with the liquid-phase solution, the at least a portion of one of the first doped region or the second doped region at a first etch rate and the at least a portion of the other of the first doped region or the second doped region at a second etch rate; wherein the first etch rate can be greater than the second etch rate.
    Type: Application
    Filed: March 23, 2018
    Publication date: December 3, 2020
    Inventors: Shyh-Chiang SHEN, Theeradetch DetchProhm, Russell Dean Dupuis, Young Jae Park, Oliver Moreno
  • Publication number: 20100072518
    Abstract: Methods of fabricating semiconductor devices using electrode-less wet-etching techniques to reduce defect densities on etched group III-nitride semiconductor surfaces are described herein. The methods generally involve contacting an etched surface of a component of a semiconductor device with a solution comprising a metal hydroxide and an oxidizing agent effective to reduce a roughness of the etched surface, wherein the etched surface is formed from a composition comprising a nitride of a group III element. Improved semiconductor devices are also disclosed.
    Type: Application
    Filed: September 14, 2009
    Publication date: March 25, 2010
    Applicant: Georgia Tech Research Corporation
    Inventors: Shyh-Chiang Shen, Russell Dean Dupuis, Yun Zhang
  • Publication number: 20070001195
    Abstract: An indium phosphide based double hetero junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.
    Type: Application
    Filed: September 8, 2006
    Publication date: January 4, 2007
    Inventors: Shyh-Chiang Shen, David Caruth, Milton Feng
  • Patent number: 7142076
    Abstract: A high life cycle and low voltage MEMS device. In an aspect of the invention, separate support posts are disposed to prevent a suspended switch pad from touching the actuation pad while permitting the switch pad to ground a signal line. In another aspect of the invention, cantilevered support beams are made from a thicker material than the switching pad. Increased thickness material in the cantilever tends to keep the switch flat in its resting position. Features of preferred embodiments include dimples in the switch pad to facilitate contact with a signal line and serpentine cantilevers arranged symmetrically to support the switch pad.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: November 28, 2006
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Nick Holonyak, Jr., David Becher, Shyh-Chiang Shen, Richard Chan
  • Patent number: 7115918
    Abstract: An indium phosphide based double hetero-junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: October 3, 2006
    Assignee: Xindium Technologies, Inc.
    Inventors: Shyh-Chiang Shen, David Charles Caruth, Milton Feng
  • Publication number: 20060063340
    Abstract: An indium phosphide based double hetero junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.
    Type: Application
    Filed: November 7, 2005
    Publication date: March 23, 2006
    Inventors: Shyh-Chiang Shen, David Caruth, Milton Feng
  • Publication number: 20050173730
    Abstract: An indium phosphide based double hetero-junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 11, 2005
    Inventors: Shyh-Chiang Shen, David Caruth, Milton Feng
  • Patent number: 6919784
    Abstract: A high life cycle and low voltage MEMS device. In an aspect of the invention, separate support posts are disposed to prevent a suspended switch pad from touching the actuation pad while permitting the switch pad to ground a signal line. In another aspect of the invention, cantilevered support beams are made from a thicker material than the switching pad. Increased thickness material in the cantilever tends to keep the switch flat in its resting position. Features of preferred embodiments include dimples in the switch pad to facilitate contact with a signal line and serpentine cantilevers arranged symmetrically to support the switch pad.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: July 19, 2005
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Nick Holonyak, Jr., David Becher, Shyh-Chiang Shen, Richard Chan
  • Publication number: 20050062566
    Abstract: A high life cycle and low voltage MEMS device. In an aspect of the invention, separate support posts are disposed to prevent a suspended switch pad from touching the actuation pad while permitting the switch pad to ground a signal line. In another aspect of the invention, cantilevered support beams are made from a thicker material than the switching pad. Increased thickness material in the cantilever tends to keep the switch flat in its resting position. Features of preferred embodiments include dimples in the switch pad to facilitate contact with a signal line and serpentine cantilevers arranged symmetrically to support the switch pad.
    Type: Application
    Filed: June 14, 2004
    Publication date: March 24, 2005
    Inventors: Milton Feng, Richard Chan, Nick Holonyak, David Becher, Shyh-Chiang Shen
  • Publication number: 20040173817
    Abstract: The speed at which optical networking devices operate is increased with the present invention with integrated circuits that provide both optical and electronic functions. The present invention provides highly integrated p-i-n or p-i-n-i-p photodetectors and heterojunction bipolar transistors for amplifying photodetector signals formed from a single semiconductor layer stack. The techniques are applicable for the integration of all InP-based and GaAs-based single-heterojunction bipolar transistors and double-heterojunction bipolar transistors. The photodetectors and transistors are formed from common layers, allowing them to be manufactured simultaneously during a processing of the stack. Integrating these components on a single circuit has the potential to greatly increase the speed (in excess of 40 Gb/s) and to decrease the cost of high-speed networking components through the development of compact optical circuits for optical networking.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 9, 2004
    Inventors: Milton Feng, Shyh-Chiang Shen
  • Publication number: 20040124436
    Abstract: An epitaxial layer structure that achieves reliable, high speed, and low noise device performance in indium phosphide (InP) based heterojunction bipolar transistors (HBTs) for high data rate receivers and optoelectronic integrated circuits (OEIC). The layer consists of an n+InGaAs subcollector, an n+InP subcollector, an unintentionally doped InGaAs collector, a carbon-doped base, an n-type InP emitter, an n-type InGaAs etch-stop layer, an n-type InP emitter, and an InGaAs cap layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: Milton Feng, Shyh-Chiang Shen, David C. Caruth
  • Patent number: 6727530
    Abstract: The speed at which optical networking devices operate is increased with the present invention with integrated circuits that provide both optical and electronic functions. The present invention provides highly integrated p-i-n or p-i-n-i-p photodetectors and heterojunction bipolar transistors for amplifying photodetector signals formed from a single semiconductor layer stack. The techniques are applicable for the integration of all InP-based and GaAs-based single-heterojunction bipolar transistors and double-heterojunction bipolar transistors. The photodetectors and transistors are formed from common layers, allowing them to be manufactured simultaneously during a processing of the stack. Integrating these components on a single circuit has the potential to greatly increase the speed (in excess of 40 Gb/s) and to decrease the cost of high-speed networking components through the development of compact optical circuits for optical networking.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: April 27, 2004
    Assignee: Xindium Technologies, Inc.
    Inventors: Milton Feng, Shyh-Chiang Shen
  • Patent number: 6717496
    Abstract: The present invention is an electromagnetic energy, e.g., visible light, controlled low actuation voltage MEMS switch. Stimulation of photovoltaic diodes causes a switching that controls the flow of a signal. A metal or other suitable conductive pad moves freely up and down within brackets, without the need for deformation, in response to the diodes to either ground a signal or permit it to pass. The low activation voltage of the bracketed pad structure permits the use of a reasonable number of photovoltaic diodes to develop sufficient voltage for actuation of the switch, allowing the realization of the present electromagnetic energy, e.g., visible light, controlled MEMS switch in a minimized chip area. The photovoltaic diodes do not require an independent DC power source to operate the switch of the invention. Use of different wavelengths to excite different sets of diodes allows turning on and off of the switch of the invention.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: April 6, 2004
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Shyh-Chiang Shen
  • Patent number: 6678943
    Abstract: A method for controlling the flow of signals by selectively switching signals to ground and allowing signals to pass through a signal line based a position of a conductive pad. The method includes the steps of forming a conductive coplanar signal line and ground planes, depositing a first release layer over the signal line and ground planes, and forming a conductive pad spanning portions of both the signal line and ground planes on the first release layer. The method also includes the steps of forming a second release layer over the conductive pad, forming two sets of holes through the first and second release layers down to the ground planes with the two sets of holes being formed around portions of the conductive path, and forming a dielectric suspension in a first set of the two sets of holes.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: January 20, 2004
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Shyh-Chiang Shen
  • Publication number: 20040008099
    Abstract: A high life cycle and low voltage MEMS device. In an aspect of the invention, separate support posts are disposed to prevent a suspended switch pad from touching the actuation pad while permitting the switch pad to ground a signal line. In another aspect of the invention, cantilevered support beams are made from a thicker material than the switching pad. Increased thickness material in the cantilever tends to keep the switch flat in its resting position. Features of preferred embodiments include dimples in the switch pad to facilitate contact with a signal line and serpentine cantilevers arranged symmetrically to support the switch pad.
    Type: Application
    Filed: July 9, 2002
    Publication date: January 15, 2004
    Applicant: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Nick Holonyak, David Becher, Shyh-Chiang Shen, Richard Chan
  • Publication number: 20030090350
    Abstract: The present invention is an electromagnetic energy, e.g., visible light, controlled low actuation voltage MEMS switch. Stimulation of photovoltaic diodes causes a switching that controls the flow of a signal. A metal or other suitable conductive pad moves freely up and down within brackets, without the need for deformation, in response to the diodes to either ground a signal or permit it to pass. The low activation voltage of the bracketed pad structure permits the use of a reasonable number of photovoltaic diodes to develop sufficient voltage for actuation of the switch, allowing the realization of the present electromagnetic energy, e.g., visible light, controlled MEMS switch in a minimized chip area. The photovoltaic diodes do not require an independent DC power source to operate the switch of the invention. Use of different wavelengths to excite different sets of diodes allows turning on and off of the switch of the invention.
    Type: Application
    Filed: November 13, 2001
    Publication date: May 15, 2003
    Applicant: The Board of Trustees of the University of Illinos
    Inventors: Milton Feng, Shyh-Chiang Shen
  • Patent number: 6143997
    Abstract: A method and apparatus for controlling the flow of signals by selectively switching signals to ground and allowing signals to pass through a signal line based a position of a conductive pad. The switch contains waveguides including the signal line and at least one ground plane. The conductive pad responds to an actuation voltage to electrically connect the signal line and the ground planes when the metal pad is located in a relaxed position. When not located in the relaxed position, the switch breaks the connection to allow signals to flow through the signal line unimpeded. Brackets guide the pad as the pad moves between the relaxed position and a stimulated position due to the actuation voltage, without substantially deforming the conductive pad.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: November 7, 2000
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Milton Feng, Shyh-Chiang Shen