Patents by Inventor Siaw Suian Sabrina Su

Siaw Suian Sabrina Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7335990
    Abstract: A semiconductor device, having a composite barrier layer, comprising the following. A substrate has a dielectric layer formed thereover and having an opening within the dielectric layer. The opening exposes a first portion of the substrate. A composite barrier layer lines the opening. The composite barrier layer comprises: a dielectric flash layer within the opening and lining the opening wherein the dielectric flash layer does not cover the first exposed portion of the substrate; an aluminum layer over the dielectric flash layer and over the first exposed portion of the substrate; and a barrier metal layer over the aluminum layer. Wherein the dielectric flash layer, the aluminum layer and the barrier metal layer comprise the composite barrier layer. A planarized metal plug is within the barrier metal layer lined opening.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: February 26, 2008
    Assignee: Agency for Science, Technology and Research
    Inventors: Chaoyong Li, Siaw Suian Sabrina Su, Moitreyee Mukherjee-Roy, Ramana Murthy Badam
  • Patent number: 7244674
    Abstract: A method of forming a composite barrier layer comprising the following steps. A substrate having a dielectric layer formed thereover is provided. An opening exposing a first portion of the substrate is formed within the dielectric layer. A dielectric flash layer is formed within the opening and over the first exposed portion of the substrate. The dielectric flash layer lines the opening. The bottommost horizontal portion of the dielectric flash layer is removed to expose a second portion of the substrate. An aluminum layer is formed over the etched dielectric flash layer and over the second exposed portion of the substrate. A barrier metal layer is formed over the aluminum layer. The etched dielectric flash layer, the aluminum layer and the barrier metal layer comprise the composite barrier layer. A planarized metal plug is formed within the barrier metal layer lined opening.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: July 17, 2007
    Assignee: Agency for Science Technology and Research
    Inventors: Chaoyong Li, Siaw Suian Sabrina Su, Moitreyee Mukherjee-Roy, Ramana Murthy Badam