Patents by Inventor Siddharth Guha

Siddharth Guha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9405872
    Abstract: A system and methods provide for an analysis of at least a portion of an integrated circuit (IC) that comprises a plurality of modules, for the purpose of identifying signals that can be indicative of the activity of the modules. By analyzing the activity of these signal immediately before and immediately after each module going from non-idle to idle and from idle to non-idle respectively, it is possible to determine which signals provide an indication that the module should be shut down. If the module can be shut down in idle state, then these input signals may be used as control signals for this purpose. By reporting to a designer the role of such signals a simple design change for detecting the activity and controlling the module, can save on power consumption, in ways not previously detected by the designer.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: August 2, 2016
    Assignee: Synopsys, Inc.
    Inventors: Solaiman Rahim, Sean Safarpour, Shekaripuram V. Venkatesh, Siddharth Guha, Fahim Rahim
  • Publication number: 20160217239
    Abstract: A power estimation signal selection tool identifies the signals of an IC design that should be captured in waveform data and activity formats during simulation or emulation. The power estimation signal tool reduces the volume of simulation data produced by a simulator. Signals of at least one specified type are captured in a simulated waveform data (SWD) format. Alternatively, only signals affecting “when” power conditions and abstract RTL expressions are captured in the SWD format, while all other signals are captured in a switching activity data (SAD) format. The signal selections are recorded in memory as a set of simulation directives for capturing those signals during simulation or emulation prior to power estimation. A power estimation tool can read the simulation/emulation data more efficiently and produce sufficiently accurate power estimates.
    Type: Application
    Filed: January 22, 2015
    Publication date: July 28, 2016
    Applicant: Synopsys, Inc.
    Inventors: Shekaripuram V. Venkatesh, Siddharth Guha, Aman Bansal
  • Publication number: 20150356222
    Abstract: A system and methods provide for an analysis of at least a portion of an integrated circuit (IC) that comprises a plurality of modules, for the purpose of identifying signals that can be indicative of the activity of the modules. By analyzing the activity of these signal immediately before and immediately after each module going from non-idle to idle and from idle to non-idle respectively, it is possible to determine which signals provide an indication that the module should be shut down. If the module can be shut down in idle state, then these input signals may be used as control signals for this purpose. By reporting to a designer the role of such signals a simple design change for detecting the activity and controlling the module, can save on power consumption, in ways not previously detected by the designer.
    Type: Application
    Filed: January 20, 2015
    Publication date: December 10, 2015
    Applicant: ATRENTA, INC.
    Inventors: Solaiman Rahim, Sean Safarpour, Shekaripuram V. Venkatesh, Siddharth Guha, Fahim Rahim
  • Patent number: 8984469
    Abstract: A system and method enable strengthening of flip-Flops (FFs) in an integrated circuit (IC) for the purpose of reducing power consumption. This is achieved by using stability condition (STC) and observability don't-care (ODC) techniques. Strengthening enable is defined as ensuring that a FF later in the fan-out is enabled only when a FF earlier in the fan-out is driving a signal to that later FF. In an embodiment the fan-in of a FF is traversed and the STC or ODC is determined for the FF. Dependent on the determination a STC controller or an ODC controller is added to control the FF's enable signal. In an embodiment the power savings is checked and a controller is added only if there is a reduction in overall power consumption resulting from the addition of the controller.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: March 17, 2015
    Assignee: Atrenta, Inc.
    Inventors: Solaiman Rahim, Mohammad H. Movahed-Ezazi, Siddharth Guha, Vaibhav Jain
  • Publication number: 20140282347
    Abstract: A system and method enable strengthening of flip-Flops (FFs) in an integrated circuit (IC) for the purpose of reducing power consumption. This is achieved by using stability condition (STC) and observability don't-care (ODC) techniques. Strengthening enable is defined as ensuring that a FF later in the fan-out is enabled only when a FF earlier in the fan-out is driving a signal to that later FF. In an embodiment the fan-in of a FF is traversed and the STC or ODC is determined for the FF. Dependent on the determination a STC controller or an ODC controller is added to control the FF's enable signal. In an embodiment the power savings is checked and a controller is added only if there is a reduction in overall power consumption resulting from the addition of the controller.
    Type: Application
    Filed: December 13, 2013
    Publication date: September 18, 2014
    Applicant: Atrenta, Inc.
    Inventors: Solaiman Rahim, Mohammad H. Movahed-Ezazi, Siddharth Guha, Vaibhav Jain
  • Patent number: 8635578
    Abstract: A system and method enable strengthening of flip-Flops (FFs) in an integrated circuit (IC) for the purpose of reducing power consumption. This is achieved by using stability condition (STC) and observability don't-care (ODC) techniques. Strengthening enable is defined as ensuring that a FF later in the fan-out is enabled only when a FF earlier in the fan-out is driving a signal to that later FF. In an embodiment the fan-in of a FF is traversed and the STC or ODC is determined for the FF. Dependent on the determination a STC controller or an ODC controller is added to control the FF's enable signal. In an embodiment the power savings is checked and a controller is added only if there is a reduction in overall power consumption resulting from the addition of the controller.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 21, 2014
    Assignee: Atrenta, Inc.
    Inventors: Solaiman Rahim, Mohammad Homayoun Movahed-Ezazi, Siddharth Guha, Vaibhav Jain