Abstract: A display panel is provided in the present disclosure. The display panel has an additional function area, and the display panel includes a substrate, an array layer and a light-emitting device layer disposed in sequence on the substrate, an encapsulation layer covering the light-emitting device layer, and a touch layer disposed on the encapsulation layer. An opening area surrounded by the additional function area is disposed at an edge position of the additional function area. An opening penetrating the array layer and extending to a surface of the substrate is defined by the opening area, and the opening is filled with a light-blocking layer.

Abstract: A display panel, an array substrate, and a method of manufacturing thereof are provided, and the method includes: forming a semiconductor material layer, a barrier component, a first insulating layer, a gate, a second insulating layer, and an interlayer dielectric layer on the array substrate in order; performing a photolithographic process on the first insulating layer, gate, second insulating layer, and interlayer dielectric layer with a predetermined mask, forming a first via hole, a second via hole, and a groove; forming a source, drain, metal component and; and forming a planarization layer.

Abstract: A display panel and a display device are provided. By manufacturing a first via hole and a second via hole first, and then manufacturing a third via hole and a fourth via hole, the first via hole and the second via hole have been covered by a corresponding first drain electrode and first source electrode before performing hydrofluoric acid cleaning processes, and a first drain region and a first source region of a first oxide transistor are not affected by the hydrofluoric acid cleaning process, thereby allowing an oxide channel of the first oxide transistor to also be prevented from being affected.

Abstract: A thin film transistor array substrate and a display device are provided. The thin film transistor array substrate includes a first semiconductor layer, a second semiconductor layer, a first gate electrode, a conductive layer, a second gate electrode, a third gate electrode, and an intermediate insulating layer. The first semiconductor layer and the second semiconductor layer are made of different semiconductor materials. The first gate electrode and the conductive layer overlap with the first semiconductor layer. The second gate electrode and the third gate electrode overlap with the second semiconductor layer. The intermediate insulating layer is disposed between the second semiconductor layer and the second gate electrode.

Abstract: Disclosed are a touch display panel and a display device. The touch display panel includes an array substrate, a light-emitting functional layer, an encapsulating layer and a touch control layer that are sequentially disposed. The touch control layer includes a plurality of touch electrode blocks arranged in an array and further includes a plurality of electrode lines connected to the plurality of touch electrode blocks in one-to-one correspondence. Each touch electrode block is provided with a hollow structure, and each touch electrode blocks is symmetrical at least with respect to a first axis and a second axis that are perpendicular to each other.

Abstract: A display panel and a manufacturing method thereof are provided. The method includes following steps: forming a transistor array layer in an opening area and a display area of the display panel, and forming a barrier layer and an encapsulation layer, which respectively covers the transistor array layer in the opening area and the transistor array layer in the display area.

Abstract: An organic light-emitting diode array substrate and manufacturing method thereof are provided. The manufacturing method includes forming a semiconductor layer, a gate insulating layer, a gate, and a first insulating layer on a substrate; forming a first metal pattern on the first insulating layer, and the first metal pattern connecting to the gate through the through hole; forming a second insulating layer covering the first metal pattern on the first insulating layer; and forming a second metal pattern on the second insulating layer so that the second metal pattern and the first metal pattern overlap each other to form a capacitor.

Abstract: A display panel and a manufacturing method thereof and a display device using the same are provided. The display panel includes a display region and a non-display region. The display panel includes a substrate, a plurality of thin film transistors (TFTs) and a planarization layer sequentially stacked and at least one buffer unit disposed between the planarization layer and the substrate, wherein the buffer unit is located outside the TFT. The buffer unit is positioned in the display region and used for buffering stress of the display panel during bending.

Abstract: Disclosed are a touch display panel and a display device. The touch display panel includes an array substrate, a light-emitting functional layer, an encapsulating layer and a touch control layer that are sequentially disposed. The touch control layer includes a plurality of touch electrode blocks arranged in an array and further includes a plurality of electrode lines connected to the plurality of touch electrode blocks in one-to-one correspondence. Each touch electrode block is provided with a hollow structure, and each touch electrode blocks is symmetrical at least with respect to a first axis and a second axis that are perpendicular to each other.

Abstract: A display panel is provided. It defines a first display area and a second display area, including a substrate layer; the substrate layer includes a first portion, whose location is corresponding to the first display area, and a second portion, whose location is corresponding to the second display area. The second portion of the substrate layer can achieve a transmittance of 80% or more for an entire visible light band. A display panel provided is capable of performing an entire full-screen display, with high light transmittance without a significant non-display area.

Abstract: A display panel and a manufacturing method thereof and a display device using the same are provided. The display panel includes a display region and a non-display region. The display panel includes a substrate, a plurality of thin film transistors (TFTs) and a planarization layer sequentially stacked and at least one buffer unit disposed between the planarization layer and the substrate, wherein the buffer unit is located outside the TFT. The buffer unit is positioned in the display region and used for buffering stress of the display panel during bending.

Abstract: A flexible array substrate, a display panel, and a manufacturing method are provided. The disclosure has advantages that in a bending area, a thickness of a material layer below a metal trace is reduced, and a thickness of the material layer above the metal trace is increased, which facilitates to adjust the metal trace to a neutral surface, and improves a bending resistance and stability of the metal trace.

Abstract: The invention discloses a display panel, a preparation method thereof, and a display device. The display panel includes a substrate, a flexible layer, and a thin film transistor layer. A portion of the flexible layer corresponding to the image capturing area is transparent. The thin film transistor layer includes: a plurality of first thin film transistor units disposed within the image capturing area and a plurality of second thin film transistor units disposed within the non-image capturing area, a density of the first thin film transistor units is less than that of the second thin film transistor units.

Abstract: An organic light-emitting diode array substrate and manufacturing method thereof are provided. The manufacturing method includes forming a semiconductor layer, a gate insulating layer, a gate, and a first insulating layer on a substrate; forming a first metal pattern on the first insulating layer, and the first metal pattern connecting to the gate through the through hole; forming a second insulating layer covering the first metal pattern on the first insulating layer; and forming a second metal pattern on the second insulating layer so that the second metal pattern and the first metal pattern overlap each other to form a capacitor.

Abstract: A manufacturing method of a flexible display panel and the flexible display panel are provided in the present disclosure. The flexible display panel includes a flexible substrate, a blocking layer, a buffering layer, an active layer, a first gate electrode insulating layer, a first gate electrode metal layer, a second gate electrode insulating layer, a second gate electrode metal layer, an organic interlayer insulating layer, a source/drain electrode metal layer, a passivation layer, an anode metal layer, a pixel isolation layer, and a pixel support layer. The source/drain electrode metal layer is connected to the active layer and the second gate electrode metal layer through two through holes.

Abstract: A flexible display panel includes a flexible substrate, a blocking layer, a buffering layer, an active layer, a first gate electrode insulating layer, a gate electrode metal layer, a second gate electrode insulating layer, a first source/drain electrode metal layer, an interlayer insulating layer, a first passivation layer, a second source/drain electrode metal layer, a second passivation layer, an anode metal layer, a pixel isolation layer, and a pixel support layer. The second source/drain electrode metal layer is connected to the active layer and the first source/drain electrode metal layer via two through holes.

Abstract: An OLED display device includes a display area and a non-display area. A plurality of signal wires, a bending area, and a bonding area are disposed in the non-display area. The signal wires located at the bending area at least include a VDD signal wire and a VSS signal wire, and an organic layer insulation layer is disposed in the bending area. An edge length at an end of a part of the organic layer insulation layer between the VDD signal wire and the VSS signal wire is greater than or equal to 3000 micrometers.

Abstract: The present disclosure provides a manufacturing method of an array substrate, including: forming a gate layer on a substrate; forming a gate insulating material layer on the gate layer; forming a polysilicon material layer on the gate insulating material layer; depositing an etch stop material layer on the polysilicon material layer; channel doping the polysilicon material layer; etching the polysilicon material layer, the etch stop material layer and the gate insulating material layer to form an active layer, an etch stop layer and a gate insulating layer; forming a source/drain layer on the active layer and the gate insulating layer, the active layer being electrically connected to the source/drain layer; and forming a through hole on the source/drain layer to form a source and a drain, the through hole being corresponding to the active layer, and both of the source and the drain being electrically connected to the active layer.

Abstract: The present disclosure provides a manufacturing method of an array substrate, including: forming a gate layer on a substrate; forming a gate insulating material layer on the gate layer; forming a polysilicon material layer on the gate insulating material layer; depositing an etch stop material layer on the polysilicon material layer; channel doping the polysilicon material layer; etching the polysilicon material layer, the etch stop material layer and the gate insulating material layer to form an active layer, an etch stop layer and a gate insulating layer; forming a source/drain layer on the active layer and the gate insulating layer, the active layer being electrically connected to the source/drain layer; and forming a through hole on the source/drain layer to form a source and a drain, the through hole being corresponding to the active layer, and both of the source and the drain being electrically connected to the active layer.

Abstract: A flexible display panel includes a flexible substrate, a blocking layer, a buffering layer, an active layer, a first gate electrode insulating layer, a gate electrode metal layer, a second gate electrode insulating layer, a first source/drain electrode metal layer, an interlayer insulating layer, a first passivation layer, a second source/drain electrode metal layer, a second passivation layer, an anode metal layer, a pixel isolation layer, and a pixel support layer. The second source/drain electrode metal layer is connected to the active layer and the first source/drain electrode metal layer via two through holes.