Patents by Inventor Silvia Marabelli

Silvia Marabelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8810302
    Abstract: A low voltage isolation circuit is coupled between an input terminal for receiving a high voltage signal and an output terminal for transmitting the high voltage signal to a load. The isolation circuit includes a driving block; having a first driving transistor coupled between a first voltage reference and an intermediate node and a second driving transistor coupled between the intermediate node and a second voltage reference; an isolation block connected between the input and output terminals and, through a protection block to the intermediate node. The protection block includes first and second protection transistors (MD1, coupled in anti-series to each other and having control terminals receiving complementary protection driving signals. The isolation block includes a voltage limiter block, a diode block and a control transistor connected across the diode block between the input and output terminals and having a control terminal connected to the intermediate node through the protection block.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: August 19, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Valeria Bottarel, Giulio Ricotti, Silvia Marabelli
  • Publication number: 20120313689
    Abstract: A low voltage isolation circuit is coupled between an input terminal for receiving a high voltage signal and an output terminal for transmitting the high voltage signal to a load. The isolation circuit includes a driving block; having a first driving transistor coupled between a first voltage reference and an intermediate node and a second driving transistor coupled between the intermediate node and a second voltage reference; an isolation block connected between the input and output terminals and, through a protection block to the intermediate node. The protection block includes first and second protection transistors (MD1, coupled in anti-series to each other and having control terminals receiving complementary protection driving signals. The isolation block includes a voltage limiter block, a diode block and a control transistor connected across the diode block between the input and output terminals and having a control terminal connected to the intermediate node through the protection block.
    Type: Application
    Filed: June 28, 2012
    Publication date: December 13, 2012
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Valeria Bottarel, Giulio Ricotti, Silvia Marabelli