Abstract: A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.

Abstract: The present disclosure discloses a three-dimensional memory and a fabrication method thereof. The fabrication method comprises: forming a stack structure comprising alternately stacked dielectric layers and sacrificial layers; forming a gate line slit penetrating vertically penetrating the stack structure and extending in a first horizontal direction; and etching portions of the dielectric layers and the sacrificial layers adjacent to the gate line slit to form a plurality of recesses, wherein an aperture of each recess in a vertical direction is greater than a thickness of a corresponding sacrificial layer.

Abstract: A semiconductor device includes: a substrate; stacked layers on the substrate including insulating layers and gate layers that are alternately stacked in a longitudinal direction and extending in a first lateral direction and a second lateral direction; a channel column array including a plurality of channel columns in the stacked layers; a dummy channel column array including a plurality of dummy channel columns in the stacked layers; and a gate isolating trench in the stacked layers, the gate isolating trench extends between the channel column array and the dummy channel column array along the second lateral direction. The first lateral direction and the second lateral direction are perpendicular to each other and are both perpendicular to the longitudinal direction.

Abstract: A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.

Abstract: A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.

Abstract: A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.

Abstract: The present application provides internet browsing especially a three dimensional webpage browsing methods and systems by using the movement of a computing device with a display. By moving the computing device, a user changes the location and the orientation of the computing device, and thus interacts with at least one information item in a first web page. The computing device measures the location difference and the orientation difference between the computing device and the information item, and determines whether each of the location difference and the orientation difference is within a threshold, respectively. If both the location and orientation differences are within the threshold for a predetermined time, the user is directed to a second web page.

Abstract: The present application provides internet browsing especially a three dimensional webpage browsing methods and systems by using the movement of a computing device with a display. By moving the computing device, a user changes the location and the orientation of the computing device, and thus interacts with at least one information item in a first web page. The computing device measures the location difference and the orientation difference between the computing device and the information item, and determines whether each of the location difference and the orientation difference is within a threshold, respectively. If both the location and orientation differences are within the threshold for a predetermined time, the user is directed to a second web page.

Abstract: Embodiments of the present application relate to a method, device, and system for processing playback of video data. The method includes obtaining an instruction during playback of video data, generating a request for data based at least in part on the instruction, wherein the request for data comprises information associated with the video data, communicating the request for data, obtaining results associated with the request for data, wherein the results associated with the request for data comprise one or more related objects relating to the video data, the one or more related objects corresponding to one or more respective application types, at least one of the one or more application types corresponding to at least one of the one or more related objects differing from an application type of the video data, and providing at least one of the one or more related objects concurrently with the video data.

Abstract: Inverted cucurbituril compounds having at least one pair of hydrogen atoms protruding into an internal molecular cavity thereof.

Abstract: Aspects of the invention include methods of predicting a subject's susceptibility to developing type 2 diabetes. Embodiments of the methods include obtaining a sex hormone-binding globulin (SHBG) level value for the subject, e.g., by detecting a SHBG plasma concentration and/or a SHBG polymorphism phenotype, and predicting the subject's susceptibility to developing type 2 diabetes from the obtained SHBG level value. Also provided are devices and kits that find use in practicing embodiments of the methods. In addition, methods of treating a subject for type 2 diabetes and/or preventing the onset of type 2 diabetes are provided.

Abstract: Inverted cucurbituril compounds having at least one pair of hydrogen atoms protruding into an internal molecular cavity thereof.