Patents by Inventor Simon Eicher

Simon Eicher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060094247
    Abstract: In a method for forming a stepped profile from a layer sequence comprising a first patterning step, in which a first layer partial sequence is removed apart from a first residual layer partial sequence, a second patterning step, in which a second layer partial sequence located below the first layer partial sequence is partially removed by means of etching with a second etchant, and a third patterning step, in which a third layer partial sequence located below the second layer partial sequence is partially removed by means of etching with a third etchant, according to the invention, a region of the second layer partial sequence that is located below the first residual layer partial sequence is removed in the second patterning step and the first projection of the first residual layer partial sequence is removed in the third patterning step.
    Type: Application
    Filed: October 17, 2003
    Publication date: May 4, 2006
    Applicant: ABB Schweiz AG
    Inventors: Jerome Assal, Simon Eicher, Erich Nanser
  • Patent number: 6323717
    Abstract: According to this invention, there is provided a drive apparatus for a power device having high- and low-voltage main electrodes and a control electrode, including a circuit for decreasing a voltage of the control electrode to a voltage of the control electrode which is not higher than a threshold voltage of the power device before a voltage between the high- and low-voltage main electrodes enters an overshoot region in a case where the power device is to be turned off. Therefore, electron injection can be stopped before the voltage between the main electrodes rises, the stability of the current density can be improved, and current concentration, oscillation, and the like can be prevented to improve reliability.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: November 27, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ichiro Omura, Suzuo Saito, Hiromichi Ohashi, Tomokazu Domon, Koichi Sugiyama, Simon Eicher, Tsuneo Ogura
  • Patent number: 5710445
    Abstract: A GTO is specified which, starting from the anode-side main surface (2), comprises an anode emitter (6), a barrier layer (11), an n-base (7), a p-base (8) and a cathode emitter (9). The anode emitter (6) is designed as a transparent emitter and has anode short-circuits (10). By virtue of the combination of the barrier layer, the transparent anode emitter and the anode short-circuits, a GTO is obtained which can be operated at high switching frequencies, the substrate thickness of which can be reduced and which nevertheless exhibits no increase in the switching losses.
    Type: Grant
    Filed: June 27, 1995
    Date of Patent: January 20, 1998
    Assignee: Asea Brown Boveri AG
    Inventors: Friedhelm Bauer, Simon Eicher