Abstract: Various embodiments provide systems and methods which disclose a device which may be used to determine an audio event based on receiving an audio signal. Based on the determined audio event, audio activity may be tracked. The tracked audio activity may be summarized based on a summary mode. Feedback of the summarized tracked audio activity may be based on a feedback mode.

Abstract: Various embodiments provide systems and methods which disclose a device which may be used to determine an audio event based on receiving an audio signal. Based on the determined audio event, audio activity may be tracked. The tracked audio activity may be summarized based on a summary mode. Feedback of the summarized tracked audio activity may be based on a feedback mode.

Abstract: A method for updating a Bluetooth Low Energy (BLE) device from a host device, the BLE device including a processor, a non-volatile memory and a volatile memory, and being capable of data transfer via a Human Interface Device (HID) service, said non-volatile memory including partitions for a plurality of application images, said method including configuring a pointer to instruct the processor to copy a first application image in a first partition of the non-volatile memory to the volatile memory when the device starts up; transferring a second application image from the host device to a second partition of the non-volatile memory using Bluetooth HID service; and re-configuring the pointer to instruct the processor to copy the second application image in the second partition of the non-volatile memory to the volatile memory when the device next starts up if the second application image is error free.

Abstract: An integrated circuit comprising: a first core circuit configured to operate at a first clock rate for carrying out a first range of tasks; and a second core circuit configured to operate in a first mode and a second mode, the second core circuit being configured to operate at a second clock rate for carrying out a second range of tasks in the second mode and being configured to operate in the second mode when the first core circuit carries out the first range of tasks, the second clock rate being greater than the first clock rate.

Abstract: An integrated circuit comprising: a first core circuit configured to operate at a first clock rate for carrying out a first range of tasks; and a second core circuit configured to operate in a first mode and a second mode, the second core circuit being configured to operate at a second clock rate for carrying out a second range of tasks in the second mode and being configured to operate in the second mode when the first core circuit carries out the first range of tasks, the second clock rate being greater than the first clock rate.

Abstract: An integrated circuit comprising: a first core circuit configured to operate at a first clock rate for carrying out a first range of tasks; and a second core circuit configured to operate in a first mode and a second mode, the second core circuit being configured to operate at a second clock rate for carrying out a second range of tasks in the second mode and being configured to operate in the second mode when the first core circuit carries out the first range of tasks, the second clock rate being greater than the first clock rate.