Abstract: A method and structure providing an optical sensor having an optimized Ge—Si interface includes providing a substrate having a pixel region and a logic region. In some embodiments, the method further includes forming a trench within the pixel region. In various examples, and after forming the trench, the method further includes forming a doped semiconductor layer along sidewalls and along a bottom surface of the trench. In some embodiments, the method further includes forming a germanium layer within the trench and over the doped semiconductor layer. In some examples, and after forming the germanium layer, the method further includes forming an optical sensor within the germanium layer.

Abstract: The present disclosure provides a method for fabricating an image sensor. The method includes the following operations. A cavity is formed at a first surface of a substrate. A germanium layer is formed in the cavity. A first heavily doped region is formed in the germanium layer by an implantation operation. A second heavily doped region is formed at a position proximal to a top surface of the germanium layer, wherein the second heavily doped region is laterally surrounded by the first heavily doped region from a top view perspective. An interconnect structure is formed over the germanium layer.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.

Abstract: An antenna structure includes a substrate, a plurality of reflective plates, a grounding plate, a radiating member, a signal feeding via and a plurality of conductive vias. The substrate has opposite first and second surfaces and comprises liquid crystal polymer. The reflective plates are arrayed on the first surface of the substrate. The grounding plate is disposed on the second surface of the substrate and overlapped with the reflective plates in a normal direction of the substrate. The grounding plate further includes an opening. The radiating member is disposed on the first surface of the substrate and physically separated from the reflective plates. The signal feeding via is coupled with the radiating member and penetrates through the substrate to be exposed in the opening of the grounding plate. The conductive vias penetrate through the substrate and respectively connect the reflective plates and the grounding plate.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.

Abstract: A process tool including a polishing pad on a top surface of a wafer platen. A wafer carrier is configured to hold a wafer over the polishing pad. A slurry dispenser is configured to dispense an abrasive slurry including a plurality of charged abrasive particles having a first polarity onto the polishing pad. A first conductive rod is within the wafer platen and coupled to a first voltage supply. A wafer roller is configured to support the wafer. A first wafer brush is arranged beside the wafer roller. A second conductive rod is within the first wafer brush and coupled to a second voltage supply. The first voltage supply is configured to apply a first charge having a second polarity, opposite the first polarity, to the first conductive rod. The second voltage supply is configured to apply a second charge having the second polarity to the second conductive rod.

Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current flowing through one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.

Abstract: An electronic device and a repair method thereof are provided. The repair method of the electronic device includes: providing a panel, wherein the panel includes a substrate, a first conductive layer disposed on the substrate, a transistor disposed on the substrate, and a dielectric layer disposed between the first conductive layer and the transistor, wherein the transistor comprises a first electrode and a second electrode; and cutting at least one of the first electrode and the second electrode with a laser beam, wherein a cutting point formed by the laser beam does not overlap with the first conductive layer.

Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current to illuminate one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.

Abstract: This disclosure provides a communication device and a manufacturing method thereof. The manufacturing method of the communication device includes the following steps: providing a first dielectric layer, wherein the first dielectric layer includes a first region and a second region, and the first dielectric layer has a first surface and a second surface opposite to the first surface; providing a second dielectric layer; combining the first dielectric layer and the second dielectric layer with a sealing element, so that the sealing element is disposed between the first surface of the first dielectric layer and a third surface of the second dielectric layer; after combining the first dielectric layer and the second dielectric layer, thinning the second surface of the first dielectric layer; and disposing a first communication element on the first surface of the first dielectric layer in the first region.

Abstract: A manufacturing method of an electronic device including following steps is provided. A first substrate is provided. A thermal release adhesive layer is provided on the first substrate. A thinning process is performed on the first substrate to form a first thinned substrate. A cutting process is performed on the first thinned substrate to form a first sub-substrate. The thermal release adhesive layer is separated from the first thinned substrate or the first sub-substrate. In the manufacturing method of the electronic device provided in one or more embodiments of the disclosure, the manufacturing process of the electronic device may be simplified, and/or defects of the resultant electronic device may be reduced.

Abstract: A pixel driving device includes at least one data line and at least one driver integrated circuit. The at least one data line includes a first area and a second area on both sides. The first area and the second area are separated by the at least one data line. The at least one driver integrated circuit includes a first circuit and a second circuit. The first circuit is disposed in the first area, is configured to receive at least one first high-frequency signal so as to at least one first driving signal. The second circuit is disposed in the second area, is coupled to the first circuit and is configured to receive at least one low-frequency signal.

Abstract: A shift register circuit includes a driving signal generating circuit, a coupling circuit, and a sweep signal generating circuit. The driving signal generating circuit is configured to receive a plurality of first clock signals, a low voltage source, an initial signal, and a first high voltage source so as to output a driving signal. The coupling circuit is coupled to the driving signal generating circuit. The coupling circuit is configured to transmit the low voltage source. The sweep signal generating circuit is coupled to the coupling circuit. The sweep signal generating circuit is configured to receive a second clock signal, the low voltage source, and a second high voltage source so as to output a sweep signal. A waveform of the sweep signal includes an oblique waveform. The first high voltage source and the second high voltage source are electrically independent of each other.

Abstract: A shift register circuit includes a driving signal generating circuit, a coupling circuit, and a sweep signal generating circuit. The driving signal generating circuit is configured to receive a plurality of first clock signals, a low voltage source, an initial signal, and a first high voltage source so as to output a driving signal. The coupling circuit is coupled to the driving signal generating circuit. The coupling circuit is configured to transmit the low voltage source. The sweep signal generating circuit is coupled to the coupling circuit. The sweep signal generating circuit is configured to receive a second clock signal, the low voltage source, and a second high voltage source so as to output a sweep signal. A waveform of the sweep signal includes an oblique waveform. The first high voltage source and the second high voltage source are electrically independent of each other.

Abstract: A pixel driving device includes at least one data line and at least one driver integrated circuit. The at least one data line includes a first area and a second area on both sides. The first area and the second area are separated by the at least one data line. The at least one driver integrated circuit includes a first circuit and a second circuit. The first circuit is disposed in the first area, is configured to receive at least one first high-frequency signal so as to at least one first driving signal. The second circuit is disposed in the second area, is coupled to the first circuit and is configured to receive at least one low-frequency signal.

Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current to illuminate one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.

Abstract: A semiconductor structure includes a substrate, fin-shaped structures disposed on the substrate, an isolation layer disposed between the fin-shaped structures, and a doped region disposed in an upper portion of the isolation layer, where the doped region is doped with helium or neon.

Abstract: A transparent display device is provided with a first liquid crystal layer having a first electrode, a second electrode, a plurality of first liquid crystal molecules, and a plurality of first chiral molecules disposed between the first electrode and the second electrode; and a second liquid crystal layer having a third electrode, a fourth electrode, a plurality of second liquid crystal molecules, a plurality of second chiral molecules, and a dichroic dye disposed between the third electrode and the fourth electrode. The first liquid crystal molecules and the second liquid crystal molecules both have positive anisotropies, and the dichroic dye has a visible absorption wavelength ranged from 400 to 780 nm.