Patents by Inventor Sing-Chung Hu
Sing-Chung Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942504Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.Type: GrantFiled: August 15, 2022Date of Patent: March 26, 2024Assignee: OMNIVISION TECHNOLOGIES, INC.Inventor: Sing-Chung Hu
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Patent number: 11862678Abstract: A pixel-array substrate includes a semiconductor substrate with a pixel array, a back surface, and a front surface, and a guard ring formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the front surface, the back surface forming a trench extending into the semiconductor substrate, the trench overlapping the guard ring. A method for reducing leakage current into a pixel-array includes doping a semiconductor substrate to form a guard ring that extends into the semiconductor substrate from a front surface, encloses a pixel array, excludes a periphery region, and resists a flow of electric current, and forming, into a back surface of the semiconductor substrate, a trench that penetrates into the back surface and overlaps the guard ring, the guard ring and the trench configured to resist the flow of electric current between the pixel array and the periphery region.Type: GrantFiled: June 18, 2020Date of Patent: January 2, 2024Assignee: OmniVision Technologies, Inc.Inventors: Yuanwei Zheng, Sing-Chung Hu, Gang Chen, Dyson Tai, Lindsay Grant
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Publication number: 20230307484Abstract: A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.Type: ApplicationFiled: March 22, 2022Publication date: September 28, 2023Applicant: OmniVision Technologies, Inc.Inventors: Shiyu Sun, Yuanwei Zheng, Gang Chen, Sing-Chung Hu, Armin Yazdani
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Publication number: 20230207587Abstract: An image sensor includes a photodiode disposed in a semiconductor substrate having a first surface and a second surface opposite to the first surface. A floating diffusion is disposed in the semiconductor substrate. A transfer transistor is configured for coupling the photodiode to the floating diffusion. The transfer transistor includes a vertical transfer gate extending a first depth in a depthwise direction from the first surface into the semiconductor substrate. A transistor is coupled to the floating diffusion. The transistor includes: a planar gate disposed proximate to the first surface of the semiconductor substrate; and a plurality of vertical gate electrodes, each extending a respective depth into the semiconductor substrate from the planar gate in the depthwise direction. The respective depth of at least one of the plurality of vertical gate electrodes is the same as the first depth of the vertical transfer gate.Type: ApplicationFiled: March 2, 2023Publication date: June 29, 2023Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Chiao-Ti Huang, Sing-Chung Hu, Yuanwei Zheng, Bill Phan
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Patent number: 11626433Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.Type: GrantFiled: March 25, 2020Date of Patent: April 11, 2023Assignee: OMNIVISION TECHNOLOGIES, INC.Inventors: Sing-Chung Hu, Seong Yeol Mun, Bill Phan
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Patent number: 11616088Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.Type: GrantFiled: March 25, 2020Date of Patent: March 28, 2023Assignee: OMNIVISION TECHNOLOGIES, INC.Inventors: Sing-Chung Hu, Seong Yeol Mun, Bill Phan
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Publication number: 20220392943Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Inventor: Sing-Chung Hu
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Patent number: 11456328Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.Type: GrantFiled: October 9, 2019Date of Patent: September 27, 2022Assignee: OMNIVISION TECHNOLOGIES, INC.Inventor: Sing-Chung Hu
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Publication number: 20210399093Abstract: A pixel-array substrate includes a semiconductor substrate with a pixel array, a back surface, and a front surface, and a guard ring formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the front surface, the back surface forming a trench extending into the semiconductor substrate, the trench overlapping the guard ring. A method for reducing leakage current into a pixel-array includes doping a semiconductor substrate to form a guard ring that extends into the semiconductor substrate from a front surface, encloses a pixel array, excludes a periphery region, and resists a flow of electric current, and forming, into a back surface of the semiconductor substrate, a trench that penetrates into the back surface and overlaps the guard ring, the guard ring and the trench configured to resist the flow of electric current between the pixel array and the periphery region.Type: ApplicationFiled: June 18, 2020Publication date: December 23, 2021Inventors: Yuanwei ZHENG, Sing-Chung HU, Gang CHEN, Dyson TAI, Lindsay GRANT
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Publication number: 20210305299Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.Type: ApplicationFiled: March 25, 2020Publication date: September 30, 2021Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Chiao-Ti Huang, Sing-Chung Hu, Yuanwei Zheng
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Publication number: 20210305298Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.Type: ApplicationFiled: March 25, 2020Publication date: September 30, 2021Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Sing-Chung Hu, Seong Yeol Mun, Bill Phan
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Publication number: 20210111212Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.Type: ApplicationFiled: October 9, 2019Publication date: April 15, 2021Inventor: Sing-Chung Hu
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Patent number: 10964738Abstract: An image sensor includes one or more photodiodes disposed in a semiconductor material to receive image light and generate image charge, and a floating diffusion to receive the image charge from the one or more photodiodes. One or more transfer transistors is coupled to transfer image charge in the one or more photodiodes to the floating diffusion, and a source follower transistor is coupled to amplify the image charge in the floating diffusion. The source follower includes a gate electrode (coupled to the floating diffusion), source and drain electrodes, and an active region disposed in the semiconductor material between the source and drain electrodes. A dielectric material is disposed between the gate electrode and the active region and has a first thickness and a second thickness. The second thickness is greater than the first thickness, and the second thickness is disposed closer to the drain electrode than the first thickness.Type: GrantFiled: October 2, 2018Date of Patent: March 30, 2021Assignee: OmniVision Technologies, Inc.Inventors: Gang Chen, Yuanwei Zheng, Qin Wang, Cunyu Yang, Guannan Chen, Duli Mao, Dyson Tai, Lindsay Grant, Eric Webster, Sing-Chung Hu
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Publication number: 20200105807Abstract: An image sensor includes one or more photodiodes disposed in a semiconductor material to receive image light and generate image charge, and a floating diffusion to receive the image charge from the one or more photodiodes. One or more transfer transistors is coupled to transfer image charge in the one or more photodiodes to the floating diffusion, and a source follower transistor is coupled to amplify the image charge in the floating diffusion. The source follower includes a gate electrode (coupled to the floating diffusion), source and drain electrodes, and an active region disposed in the semiconductor material between the source and drain electrodes. A dielectric material is disposed between the gate electrode and the active region and has a first thickness and a second thickness. The second thickness is greater than the first thickness, and the second thickness is disposed closer to the drain electrode than the first thickness.Type: ApplicationFiled: October 2, 2018Publication date: April 2, 2020Inventors: Gang Chen, Yuanwei Zheng, Qin Wang, Cunyu Yang, Guannan Chen, Duli Mao, Dyson Tai, Lindsay Grant, Eric Webster, Sing-Chung Hu
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Patent number: 10079261Abstract: An image sensor includes a plurality of photodiodes and a floating diffusion disposed in a semiconductor material. The image sensor also includes a plurality of transfer gates coupled between the plurality of photodiodes and the floating diffusion to transfer the image charge generated in the plurality of photodiodes into the floating diffusion. Peripheral circuitry is disposed proximate to the plurality of photodiodes and coupled to receive the image charge from the plurality of photodiodes. A shallow trench isolation structure is laterally disposed, at least in part, between the plurality of photodiodes and the peripheral circuitry to prevent electrical crosstalk between the plurality of photodiodes and the peripheral circuitry. The peripheral circuitry includes one or more transistors including a source electrode and a drain electrode that are raised above a surface of the semiconductor material.Type: GrantFiled: August 17, 2017Date of Patent: September 18, 2018Assignee: OmniVision Technologies, Inc.Inventors: Qin Wang, Bill Phan, Sing-Chung Hu, Gang Chen
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Patent number: 9865642Abstract: A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.Type: GrantFiled: June 5, 2015Date of Patent: January 9, 2018Assignee: OmniVision Technologies, Inc.Inventors: Zhenhong Fu, Dajiang Yang, Xianmin Yi, Gang Chen, Sing-Chung Hu, Duli Mao
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Patent number: 9698185Abstract: Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.Type: GrantFiled: October 13, 2011Date of Patent: July 4, 2017Assignee: OmniVision Technologies, Inc.Inventors: Gang Chen, Sing-Chung Hu, Hsin-Chih Tai, Duli Mao, Manoj Bikumandla, Wei Zheng, Yin Qian, Zhibin Xiong, Vincent Venezia, Keh-Chiang Ku, Howard E. Rhodes
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Publication number: 20160358969Abstract: A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.Type: ApplicationFiled: June 5, 2015Publication date: December 8, 2016Inventors: Zhenhong Fu, Dajiang Yang, Xianmin Yi, Gang Chen, Sing-Chung Hu, Duli Mao
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Patent number: 9496304Abstract: A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material to accumulate image charge. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is coupled to selectively transfer the image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure disposed in the semiconductor material. The DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. The DTI structure includes a doped semiconductor material disposed inside the DTI structure that is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.Type: GrantFiled: May 5, 2015Date of Patent: November 15, 2016Assignee: OmniVision Technologies, Inc.Inventors: Sing-Chung Hu, Rongsheng Yang, Gang Chen, Howard E. Rhodes, Sohei Manabe, Dyson H. Tai
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Patent number: 9419044Abstract: A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.Type: GrantFiled: April 17, 2014Date of Patent: August 16, 2016Assignee: OmniVision Technologies, Inc.Inventors: Dajiang Yang, Gang Chen, Zhenhong Fu, Duli Mao, Eric A. G. Webster, Sing-Chung Hu, Dyson H. Tai