Abstract: A novel test structure is described which can be used to accurately measure on-wafer impedances. For example, accurate measurements of the parasitic capacitances inside active devices such as Field Effect Transistors or the capacitance of interconnect lines with either the substrate or with each other can be made. The test technique involves frequency sweep S-parameter power measurements made in the range of 50 MHz to about 20 GHz. One or more identical copies of the DUT are connected on the wafer with one or more on-wafer inductances which are usually lumped, to form a two port circuit. The circuit is essentially a filter operating in the frequency range of 50 MHz to 20 GHz. Although filter circuits are normally designed to provide a flat response in the pass and stop bands, with as sharp a skirt as possible, the objective in designing this test circuit is to design a filter response with sharp inflection points that are uniquely dependent on the reactances that comprise the filter circuit.