Abstract: A pre-charge buffer for sampling input signals and generating a sampled output signal includes a coarse sampling circuit, a fine sampling circuit, and a sample and hold circuit. The coarse sampling circuit pre-samples the input signals during hold phases and for a first predetermined time interval during sample phases of the corresponding sample and hold cycles, and generates a first output signal. The fine sampling circuit samples the input signals during sample phases and generates a second output signal. The sample and hold circuit receives the first and second output signals, and generates a sampled output signal. The coarse sampling circuit provides the first output signal for a predefined time interval during the sample phases to reduce the effect of charge injection and charge sharing. The system uses bottom plate sampling to reduce charge injection caused by switches in the coarse sampling circuit.