Patents by Inventor So Hasegawa

So Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179438
    Abstract: A photoelectric conversion apparatus includes a first pixel, a second pixel, a first output line electrically connectable to the first pixel, a second output line electrically connectable to the second pixel, a first comparator electrically connectable to the first output line, and a second comparator electrically connectable to the second output line, wherein the first output line is electrically connectable to the second comparator via a first wiring line, the second output line is electrically connectable to the first comparator via a second wiring line, and the first wiring line and the second wiring line are electrically isolated from each other.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 30, 2024
    Inventors: HIDEO KOBAYASHI, SO HASEGAWA
  • Patent number: 11843880
    Abstract: The photoelectric conversion device includes a pixel including a photoelectric conversion element and outputting a signal corresponding to an amount of charge generated in the photoelectric conversion element, an output line from which a signal of the pixel is output, a clip circuit constituting a source follower circuit and including a transistor having a source connected to the output line and an interconnection connected to a gate of the transistor, and a voltage supply circuit configured to supply a first voltage and a second voltage to the interconnection. A driving power when the interconnection is controlled to the first voltage by the voltage supply circuit and a driving power when the interconnection is controlled to the second voltage by the voltage supply circuit is different.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase
  • Patent number: 11838665
    Abstract: A disclosed comparator includes a comparison circuit that performs comparison between an input signal and a reference signal and changes a level of a signal to be output to a first node in accordance with a result of the comparison; and a positive feedback circuit including an amplifier unit that includes a current source load and outputs a signal in accordance with a potential of the first node to a second node and a feedback unit that positively feeds back a signal in accordance with a potential of the second node to the first node. The feedback unit includes a first transistor to which output of the amplifier unit is fed back and a switch that controls turning on or off of the first transistor.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: December 5, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, So Hasegawa
  • Patent number: 11778348
    Abstract: A circuit includes a comparator configured to compare an input signal and another signal and output a signal indicating a result of a comparison, and an element configured to limit an amplitude of the signal indicating the result of the comparison. In a case where a current flowing through the circuit is changed, the element is able to make an adjustment of a range of a change in the amplitude due to the change in the current.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: October 3, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: So Hasegawa, Hideo Kobayashi
  • Publication number: 20230247332
    Abstract: A photoelectric conversion device includes a plurality of pixels arranged to form a plurality of columns, a plurality of comparison circuits provided corresponding to the plurality of columns and including a first input node to which a pixel signal output from a pixel of a corresponding column is input and a second input node to which a reference signal is input, a plurality of buffer circuits provided between a reference signal line to which the reference signal is supplied and each of the second input nodes of the plurality of comparison circuits, and a first switch circuit configured to set a connection state between output nodes of the plurality of buffer circuits.
    Type: Application
    Filed: January 24, 2023
    Publication date: August 3, 2023
    Inventors: HIDEO KOBAYASHI, SO HASEGAWA
  • Publication number: 20230179890
    Abstract: A photoelectric conversion apparatus comprising: pixels; processors; and a controller. Each of the processors comprise a first column circuit and a second column circuit, each of which perform A/D conversion of converting, into a digital signal, one pixel signal output from the pixel arranged in a corresponding column of the plurality of columns. The controller comprises a generator configured to generate a first signal used in the A/D conversion, and a second signal different from the first signal and used in the A/D conversion. The apparatus further comprises a selector configured to receive the first signal and the second signal, and select and supply one of the first signal and the second signal to the second column circuit in a period in which the first signal is supplied to the first column circuit.
    Type: Application
    Filed: October 24, 2022
    Publication date: June 8, 2023
    Inventors: Hideo Kobayashi, So Hasegawa, Hajime Hayami
  • Publication number: 20230132676
    Abstract: A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventors: Hideo Kobayashi, So Hasegawa
  • Patent number: 11616925
    Abstract: A photoelectric conversion apparatus comprises a first substrate having a light-receiving array and a plurality of driving lines for supplying control signals to the array and a second substrate having a first circuit that includes a driver circuit group configured to generate the control signals and is configured to function as a vertical scanning circuit which supplies the control signals to at least some of the driving lines and a second circuit including a circuit group having the same arrangement as that of the driver circuit group. The second circuit overlaps the at least some driving lines. The at least some driving lines include a driving line not electrically connected to the second circuit. The second substrate includes, at a position overlapping the second circuit, an electrically conductive line used for power supply or transfer of a signal different from the control signals.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 28, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase, Hajime Hayami, Daisuke Yoshida
  • Publication number: 20230070568
    Abstract: A photoelectric conversion device comprising: a pixel signal line configured to transmit a pixel signal; a ramp wire configured to transmit a ramp signal; a comparator configured to compare the pixel signal to the ramp signal; and a capacitive element disposed to have at least a part thereof overlapping the ramp wire in plan view.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Inventors: Hideo Kobayashi, So Hasegawa, Hajime Hayami
  • Patent number: 11470275
    Abstract: Provided is a photoelectric conversion device including a pixel array in which pixels, each of the pixels including a photoelectric conversion element, are arranged in columns, a signal line that is arranged corresponding to one of the columns in the pixel array and to which a signal from the pixel is output, a current source configured to supply the signal line with a driving current; a current adjusting unit configured to control the driving current into a current amount including a first current amount and a second current amount greater than the first current amount, and an assisting element configured to assist a change in a current flowing through the signal line when the driving current changes from the first current amount to the second current amount. The first current amount is a current amount in a state where the driving current is disconnected.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 11, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase
  • Publication number: 20220321812
    Abstract: The photoelectric conversion device includes a pixel including a photoelectric conversion element and outputting a signal corresponding to an amount of charge generated in the photoelectric conversion element, an output line from which a signal of the pixel is output, a clip circuit constituting a source follower circuit and including a transistor having a source connected to the output line and an interconnection connected to a gate of the transistor, and a voltage supply circuit configured to supply a first voltage and a second voltage to the interconnection. A driving power when the interconnection is controlled to the first voltage by the voltage supply circuit and a driving power when the interconnection is controlled to the second voltage by the voltage supply circuit is different.
    Type: Application
    Filed: March 25, 2022
    Publication date: October 6, 2022
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase
  • Publication number: 20220321820
    Abstract: Provided is a signal processing device including a first substrate, a signal generation circuit arranged in the first substrate and configured to generate a reference signal to be used for comparison with a signal output from a pixel, a circuit element arranged in the first substrate and different from the signal generation circuit, and a contact region in which a contact connecting the first substrate and a wiring layer arranged over the first substrate is arranged. In a plan view with respect to the first substrate, the contact region is arranged between the signal generation circuit and the circuit element.
    Type: Application
    Filed: March 25, 2022
    Publication date: October 6, 2022
    Inventors: Hideo Kobayashi, Daisuke Yoshida, So Hasegawa, Yu Katase, Hajime Hayami
  • Publication number: 20220321824
    Abstract: A circuit substrate to be laminated on another substrate includes a plurality of signal lines, a plurality of input portions respectively connected to the plurality of signal lines, and each configured to receive a signal from an outside of the circuit substrate, a plurality of signal processing circuits respectively connected to the plurality of input portions via the plurality of signal lines, and a plurality of transistors configured to supply a predetermined voltage to the plurality of signal lines in a state where no signal is input to the plurality of input portions from the outside. A part of the plurality of transistors is connected to a first control line, and another part of the plurality of transistors is connected to a second control line different from the first control line.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 6, 2022
    Inventors: Hideo Kobayashi, So Hasegawa
  • Publication number: 20220286100
    Abstract: A comparator according to an embodiment of the present disclosure includes a first differential transistor and a second differential transistor forming a differential pair, a first load transistor and a second load transistor respectively provided corresponding to the first differential transistor and the second differential transistor, and a first cascode transistor connected in cascode between the first differential transistor and the first load transistor.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 8, 2022
    Inventors: Hideo Kobayashi, So Hasegawa
  • Publication number: 20220272295
    Abstract: A photoelectric conversion apparatus comprises a first substrate having a light-receiving array and a plurality of driving lines for supplying control signals to the array and a second substrate having a first circuit that includes a driver circuit group configured to generate the control signals and is configured to function as a vertical scanning circuit which supplies the control signals to at least some of the driving lines and a second circuit including a circuit group having the same arrangement as that of the driver circuit group. The second circuit overlaps the at least some driving lines. The at least some driving lines include a driving line not electrically connected to the second circuit. The second substrate includes, at a position overlapping the second circuit, an electrically conductive line used for power supply or transfer of a signal different from the control signals.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase, Hajime Hayami, Daisuke Yoshida
  • Publication number: 20220210355
    Abstract: A circuit includes a comparator configured to compare an input signal and another signal and output a signal indicating a result of a comparison, and an element configured to limit an amplitude of the signal indicating the result of the comparison. In a case where a current flowing through the circuit is changed, the element is able to make an adjustment of a range of a change in the amplitude due to the change in the current.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 30, 2022
    Inventors: So Hasegawa, Hideo Kobayashi
  • Publication number: 20220182567
    Abstract: An apparatus includes a plurality of pixels arranged in an array, a first group of pixels that are arranged in a first direction among the plurality of pixels, a first line to which the first group is connected, a second group of pixels that are arranged in the first direction among the plurality of pixels, and a second line to which the second group is connected. The first line is connected to a first source. The second line is connected to a second source. The apparatus further includes a control unit configured to: (1) perform control to increase a current flowing through the second source while performing control to decrease a current flowing through the first source, or (2) suppress a variation of total amount of flowing current by changing the current flowing through the second source in response to a change in the current flowing through the first source.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 9, 2022
    Inventors: Hideo Kobayashi, So Hasegawa
  • Publication number: 20210391365
    Abstract: Provided is a photoelectric conversion device including a pixel array in which pixels, each of the pixels including a photoelectric conversion element, are arranged in columns, a signal line that is arranged corresponding to one of the columns in the pixel array and to which a signal from the pixel is output, a current source configured to supply the signal line with a driving current; a current adjusting unit configured to control the driving current into a current amount including a first current amount and a second current amount greater than the first current amount, and an assisting element configured to assist a change in a current flowing through the signal line when the driving current changes from the first current amount to the second current amount. The first current amount is a current amount in a state where the driving current is disconnected.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 16, 2021
    Inventors: Hideo Kobayashi, So Hasegawa, Yu Katase
  • Publication number: 20210266484
    Abstract: A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 26, 2021
    Inventors: Hideo Kobayashi, So Hasegawa
  • Publication number: 20210266485
    Abstract: A disclosed comparator includes a comparison circuit that performs comparison between an input signal and a reference signal and changes a level of a signal to be output to a first node in accordance with a result of the comparison; and a positive feedback circuit including an amplifier unit that includes a current source load and outputs a signal in accordance with a potential of the first node to a second node and a feedback unit that positively feeds back a signal in accordance with a potential of the second node to the first node. The feedback unit includes a first transistor to which output of the amplifier unit is fed back and a switch that controls turning on or off of the first transistor.
    Type: Application
    Filed: February 16, 2021
    Publication date: August 26, 2021
    Inventors: Hideo Kobayashi, So Hasegawa