Abstract: A distributed storage system includes a plurality of nodes comprising a first node, wherein a total number of nodes in the distributed storage system is represented by n, wherein a file stored in the distributed storage system is recovered from a subset of a number of nodes represented by k upon a file failure on a node in the distributed storage system, and wherein a failed node in the plurality of nodes is recovered from a number of helper nodes of the plurality of nodes represented by d. Upon detecting a failure in the first node, each helper node of the number of helper nodes is configured to determine a repair-encoder matrix, multiply a content matrix by the repair-encoder matrix to obtain a repair matrix, extract each linearly independent column of the repair matrix, and send the linearly independent columns of the repair matrix to the first node.

Abstract: In some examples, a device includes shuffling circuitry configured to receive an input unary bit stream and generate a shuffled bit stream by selecting n-tuple combinations of bits of the input unary bit stream. The device also includes stochastic logic circuitry having a plurality of stochastic computational units configured to perform operations on the shuffled bit stream in parallel to produce an output unary bit stream, each of the stochastic computational units operating on a different one of the n-tuple combinations of the bits.

Abstract: A distributed storage system includes a plurality of nodes comprising a first node, wherein a total number of nodes in the distributed storage system is represented by n, wherein a file stored in the distributed storage system is recovered from a subset of a number of nodes represented by k upon a file failure on a node in the distributed storage system, and wherein a failed node in the plurality of nodes is recovered from a number of helper nodes of the plurality of nodes represented by d. Upon detecting a failure in the first node, each helper node of the number of helper nodes is configured to determine a repair-encoder matrix, multiply a content matrix by the repair-encoder matrix to obtain a repair matrix, extract each linearly independent column of the repair matrix, and send the linearly independent columns of the repair matrix to the first node.

Abstract: This disclosure describes techniques for performing computational operations on input unary bit streams using one or more scaling networks. In some examples, a device is configured to perform a digital computational operation, where the device includes a plurality of input wires and a plurality of output wires. Each input wire is configured to receive a respective input bit of an encoded input value, and each output wire is configured to output a respective output bit of an encoded output value. The device also includes scaling network circuitry configured to apply a function to the encoded input value by electrically routing at least one input wire of the plurality of input wires to at least two output wires of the plurality of output wires. The device can also include hybrid binary/unary computations.

Abstract: This disclosure describes techniques for performing computational operations on input unary bit streams using one or more scaling networks. In some examples, a device is configured to perform a digital computational operation, where the device includes a plurality of input wires and a plurality of output wires. Each input wire is configured to receive a respective input bit of an encoded input value, and each output wire is configured to output a respective output bit of an encoded output value. The device also includes scaling network circuitry configured to apply a function to the encoded input value by electrically routing at least one input wire of the plurality of input wires to at least two output wires of the plurality of output wires. The device can also include hybrid binary/unary computations.

Abstract: In some examples, a device includes shuffling circuitry configured to receive an input unary bit stream and generate a shuffled bit stream by selecting n-tuple combinations of bits of the input unary bit stream. The device also includes stochastic logic circuitry having a plurality of stochastic computational units configured to perform operations on the shuffled bit stream in parallel to produce an output unary bit stream, each of the stochastic computational units operating on a different one of the n-tuple combinations of the bits.