Abstract: A socket board used for testing a semiconductor device having one or more terminals, by raising a temperature of the semiconductor device to a predetermined temperature, includes a substrate, a socket that is provided on the substrate and capable of holding the semiconductor device, a pin that penetrates a bottom portion of the socket, and has an upper portion that is to come into contact with a terminal of the semiconductor device, and a heat conductive material that is disposed on the bottom portion of the socket to come into contact with the terminals of the semiconductor device held in the socket. The heat conductive material includes a macromolecular gel, and electrically-insulating metal-containing particles added to the macromolecular gel.

Abstract: A circuit board is a wiring board frame in which a plurality of wiring boards in each of which a pair of lands electrically connected to a capacitor are formed on a first surface are arranged side by side. In the wiring board frame, an inspection path is formed. The inspection path passes between the pair of lands provided on each of the plurality of wiring boards. The inspection path includes a first wiring including one end between the pair of lands, and a second wiring including one end between the pair of lands, and the one end of the first wiring and the one end of the second wiring are formed to be separated from each other.

Abstract: In a semiconductor device, a first interposer has a first main surface. A second interposer is disposed on the first main surface. The second interposer has a second main surface on a side opposite to the first interposer. A material of the second interposer is different from that of the first interposer. A first semiconductor chip has a first front surface. The first semiconductor chip is mounted on the second main surface through a plurality of bump electrodes with the first front surface facing the second main surface. The first semiconductor chip includes a volatile memory circuit. A second semiconductor chip is mounted on a plurality of electrode patterns disposed on the first main surface or the second main surface through a plurality of bonding wires. The second interposer overlaps the first semiconductor chip in a direction perpendicular to the first main surface.

Abstract: A semiconductor device according to the present embodiment includes a wiring substrate. A semiconductor chip includes a semiconductor substrate having a first face and a second face on the opposite side to the first face, and an SRAM on the side of the first face, and is stuck to the wiring substrate on the side of the second face. The semiconductor chip includes a first metallic layer provided in the semiconductor substrate between the SRAM and the wiring substrate.

Abstract: In a semiconductor device, a first interposer has a first main surface. A second interposer is disposed on the first main surface. The second interposer has a second main surface on a side opposite to the first interposer. A material of the second interposer is different from that of the first interposer. A first semiconductor chip has a first front surface. The first semiconductor chip is mounted on the second main surface through a plurality of bump electrodes with the first front surface facing the second main surface. The first semiconductor chip includes a volatile memory circuit. A second semiconductor chip is mounted on a plurality of electrode patterns disposed on the first main surface or the second main surface through a plurality of bonding wires. The second interposer overlaps the first semiconductor chip in a direction perpendicular to the first main surface.

Abstract: A semiconductor device according to the present embodiment includes a wiring substrate. A semiconductor chip includes a semiconductor substrate having a first face and a second face on the opposite side to the first face, and an SRAM on the side of the first face, and is stuck to the wiring substrate on the side of the second face. The semiconductor chip includes a first metallic layer provided in the semiconductor substrate between the SRAM and the wiring substrate.

Abstract: According to one embodiment, there is provided a semiconductor device including a substrate, a semiconductor chip, and a conductive film. The substrate has a main face. The semiconductor chip has a surface equipped with an SRAM circuit. The semiconductor chip is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face. The conductive film is disposed on the main face or the surface. The conductive film extends planarly between the plurality of bump electrodes. A region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face.

Abstract: According to one embodiment, there is provided a semiconductor device including a substrate, a semiconductor chip, and a conductive film. The substrate has a main face. The semiconductor chip has a surface equipped with an SRAM circuit. The semiconductor chip is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face. The conductive film is disposed on the main face or the surface. The conductive film extends planarly between the plurality of bump electrodes. A region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face.

Abstract: A semiconductor memory includes a substrate having a first surface, a memory device mounted on the first surface, a controller mounted on the first surface, and a shielding layer between the first surface and at least a part of the controller, the shielding layer having a thickness that is large enough to block most of the alpha radiation from the substrate from reaching the part of the controller.

Abstract: Disclosed is a semiconductor device having improved heat dissipation efficiency. The semiconductor device includes a silicon interposer having a first surface and a second surface opposite the first surface. A plurality of semiconductor chips are provided on the first surface side of the silicon interposer. The silicon interposer has a plurality of via holes extending from the first surface to the second surface. An N type semiconductor and a P type semiconductor constituting a Peltier element are provided in each two of the via holes.

Abstract: A semiconductor device includes a semiconductor chip. A stepped member having stepped regions is provided on the semiconductor chip. The stepped member, together with a redistribution layer, is encapsulated by an encapsulating resin layer. The stepped member is exemplified by functional bumps and dummy bumps having stepped regions. The dummy bumps are electrically unconnected to the exterior, but are electrically connected to the redistribution layer.

Abstract: An electric component includes a substrate having a first surface and a second surface opposite to the first surface; a first conductive layer formed on the first surface; a second conductive layer formed on the second surface; an electrode formed on the first conductive layer; a resin portion formed on the first conductive layer such that a part of the electrode is exposed; and an external terminal electrically connected to the part of the electrode.

Abstract: A semiconductor device includes a semiconductor chip. A stepped member having stepped regions is provided on the semiconductor chip. The stepped member, together with a redistribution layer, is encapsulated by an encapsulating resin layer. The stepped member is exemplified by functional bumps and dummy bumps having stepped regions. The dummy bumps are electrically unconnected to the exterior, but are electrically connected to the redistribution layer.