Patents by Inventor Sokratis Sgouridis

Sokratis Sgouridis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11515264
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: November 29, 2022
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Publication number: 20220359428
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include: reducing a thickness of the semiconductor wafer; before or after reducing the thickness of the semiconductor wafer, placing a carrier structure at a first side of the semiconductor wafer; and after reducing the thickness of the semiconductor wafer, providing a support structure at a second side of the semiconductor wafer opposite to the first side. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Publication number: 20210253421
    Abstract: A method for producing MEMS components comprises generating a carrier having a plurality of recesses. An adhesive structure is arranged on the carrier and in the recesses. A semiconductor wafer is generated, which has a plurality of MEMS structures arranged at the first main surface of the semiconductor wafer. The adhesive structure is attached to the first main surface of the semiconductor wafer, with the recesses being arranged above the MEMS structures and the adhesive structure not contacting the MEMS structures. The semiconductor wafer is singulated into a plurality of MEMS components by applying a mechanical dicing process.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 19, 2021
    Inventors: Andre BROCKMEIER, Markus BERGMEISTER, Bernhard GOLLER, Daniel PIEBER, Sokratis SGOURIDIS
  • Publication number: 20200385264
    Abstract: In a method of generating a microelectromechanical system, MEMS, device, a MEMS substrate including a movable element is provided. A glass cover member including a glass cover is formed by hot embossing. The glass cover member is bonded to the MEMS substrate so as to hermetically seal by the glass cover a cavity in which the movable element is arranged.
    Type: Application
    Filed: June 2, 2020
    Publication date: December 10, 2020
    Applicant: Infineon Technologies AG
    Inventors: Andre BROCKMEIER, Rafael JANSKI, Boris KIRILLOV, Marten OLDSEN, Clemens ROESSLER, Francisco Javier SANTOS RODRIGUEZ, Sokratis SGOURIDIS, Kurt SORSCHAG
  • Publication number: 20190363057
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 28, 2019
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Patent number: 9708182
    Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: July 18, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
  • Patent number: 9417186
    Abstract: Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: August 16, 2016
    Assignee: Infineon Technologies AG
    Inventors: Bernhard Jakoby, Ventsislav Lachiev, Thomas Grille, Peter Irsigler, Ursula Hedenig, Sokratis Sgouridis, Thomas Krotscheck Ostermann
  • Publication number: 20150368097
    Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
    Type: Application
    Filed: August 28, 2015
    Publication date: December 24, 2015
    Inventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
  • Patent number: 9139427
    Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: September 22, 2015
    Assignee: Infineon Technologies AG
    Inventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
  • Patent number: 8735277
    Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: May 27, 2014
    Assignee: Infineon Technologies AG
    Inventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis
  • Publication number: 20140061677
    Abstract: Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 6, 2014
    Applicant: Infineon Technologies AG
    Inventors: Bernhard Jakoby, Ventsislav Lachiev, Thomas Grille, Peter Irsigler, Sokratis Sgouridis, Ursula Hedenig, Thomas Krotscheck Ostermann
  • Publication number: 20130270658
    Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
    Type: Application
    Filed: April 17, 2013
    Publication date: October 17, 2013
    Applicant: Infineon Technologies AG
    Inventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
  • Patent number: 7868452
    Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: January 11, 2011
    Assignee: Infineon Technologies AG
    Inventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis
  • Publication number: 20100330744
    Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.
    Type: Application
    Filed: September 8, 2010
    Publication date: December 30, 2010
    Inventors: Dirk Muller, Manfred Schneegans, Sokratis Sgouridis
  • Patent number: 7723158
    Abstract: In a method for producing bases with external contacts for surface mounting on circuit mounts, bases with external contacts are electrodeposited on semiconductor wafers or semiconductor chips. Subsequently, electrodeposited bases with external contacts are heat treated on the semiconductor wafers or the semiconductor chips at temperatures below the melting temperature of the deposited contact base material. Thereafter, a so-called RTP process is carried out in the form of a high-temperature interval in which the melting temperature is reached. Subsequently, the surfaces of the bases with external contacts are wet etched, the overall method being terminated by a cooling and drying operation. The bases with external contacts thus produced can be reliably surface mounted on circuit mounts.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: May 25, 2010
    Assignee: Infineon Technologies AG
    Inventors: Thomas Gutt, Sokratis Sgouridis
  • Publication number: 20070111527
    Abstract: In a method for producing bases with external contacts for surface mounting on circuit mounts, bases with external contacts are electrodeposited on semiconductor wafers or semiconductor chips. Subsequently, electrodeposited bases with external contacts are heat treated on the semiconductor wafers or the semiconductor chips at temperatures below the melting temperature of the deposited contact base material. Thereafter, a so-called RTP process is carried out in the form of a high-temperature interval in which the melting temperature is reached. Subsequently, the surfaces of the bases with external contacts are wet etched, the overall method being terminated by a cooling and drying operation. The bases with external contacts thus produced can be reliably surface mounted on circuit mounts.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 17, 2007
    Inventors: Thomas Gutt, Sokratis Sgouridis
  • Publication number: 20060292849
    Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.
    Type: Application
    Filed: May 26, 2006
    Publication date: December 28, 2006
    Inventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis