Abstract: A simplified and cost reduced process for fabricating a field-effect transistor semiconductor device (104) using laser radiation is disclosed. The process includes the step of forming removable first dielectric spacers (116R) on the sides (120a, 120b) of the gate (120). Dopants are implanted into the substrate (100) and the substrate is annealed to form an active deep source (108) and an active deep drain (110). The sidewall spacers are removed, and then a blanket pre-amorphization implant is performed to form source and drain amorphized regions (200a, 200b) that include respective extension regions (118a, 118b) that extend up to the gate. A layer of material (210 is deposited over the source and drain extensions, the layer being opaque to a select wavelength of laser radiation (220). The layer is then irradiated with laser radiation of the select wavelength so as to selectively melt the amorphized source and drain extensions, but not the underlying substrate.

Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.

Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. Tne reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.

Abstract: The invention is directed to methods for determining the wavelength, pulse length and other important characteristics of radiant energy used to anneal or to activate the source and drain regions of an integrated transistor device which has been doped through implantation of dopant ions, for example. In general, the radiant energy pulse is determined to have a wavelength from 450 to 900 nanometers, a pulse length of 0.1 to 50 nanoseconds, and an exposure energy dose of from 0.1 to 1.0 Joules per square centimeter. A radiant energy pulse of the determined wavelength, pulse length and energy dose is directed onto the source and drain regions to trigger activation. In cases where the doped region has been rendered amorphous, activation requires crystallization using the crystal structure at the boundaries as a seed.

Abstract: The invention is directed to methods for determining the wavelength, pulse length and other important characteristics of radiant energy used to anneal or to activate the source and drain regions of an integrated transistor device which has been doped through implantation of dopant ions, for example. In general, the radiant energy pulse is determined to have a wavelength from 450 to 900 nanometers, a pulse length of 0.1 to 50 nanoseconds, and an exposure energy dose of from 0.1 to 1.0 Joules per square centimeter. A radiant energy pulse of the determined wavelength, pulse length and energy dose is directed onto the source and drain regions to trigger activation. In cases where the doped region has been rendered amorphous, activation requires crystallization using the crystal structure at the boundaries as a seed.

Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.

Abstract: The invented method can be used to melt and recrystallize the source and drain regions of an integrated transistor device(s) using a laser, for example. The invented method counteracts shadowing and interference effects caused by the presence of the gate region(s) during annealing of the source and drain regions with radiant energy generated by a laser, for example. The invented method includes forming a radiant energy absorber layer over at least the gate region(s) of an integrated transistor device(s), and irradiating the radiant energy absorber layer with radiant energy to generate heat in the source and drain regions as well as in the radiant energy absorber layer. The heat generated in the radiant energy absorber layer passes through the gate region(s) to portions of source and drain regions of the integrated transistor device(s) adjacent the gate region(s).

Abstract: The invented method can be used to form silicide contacts to an integrated MISFET device. Field isolation layers are formed to electrically isolate a portion of the silicon substrate, and gate, source and drain regions are formed therein. A polysilicon runner(s) that makes an electrical connection to the integrated device, is formed on the isolation layers. The structure is subjected to ion implantation to amorphized portions of the silicon gate, source, drain and runner regions. A metal layer is formed in contact with the amorphized regions, and the metal layer overlying the active region of the integrated device is selectively irradiated using a mask. The light melts part of the gate, and amorphized source and drain regions while the remaining portions of the integrated device and substrate remain in their solid phases. Metal diffuses into the melted gate, source and drain regions which are thus converted into respective silicide alloy regions.

Abstract: A method of forming a silicide region (80) on a Si substrate (10) in the manufacturing of semiconductor integrated devices, a method of forming a semiconductor device (MISFET), and a device having suicide regions formed by the present method. The method of forming a silicide region involves forming a silicide region (80) in the (crystalline) Si substrate having an upper surface (12) and a lower surface (14). The method comprises the steps of first forming an amorphous doped region (40) in the Si substrate at or near the upper surface, to a predetermined depth (d). This results in the formation of an amorphous-crystalline interface (I) between the amorphous doped region and the crystalline Si substrate. The next step is forming a metal layer (60) atop the Si substrate upper surface, in contact with the amorphous doped region. The next step involves performing backside irradiation with a first radiation beam (66).

Abstract: The invented method produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes a step of producing an amorphous region on the silicon body using ion implantation, for example, a step of forming a metal layer such as titanium, cobalt or nickel in contact with the amorphous region, and a step of irradiating the metal with intense light from a source such as a laser, to cause metal atoms to diffuse into the amorphous region to form an alloy region with a silicide composition. In an application of the invented method to the manufacture of a MISFET device, the metal layer is preferably formed with a thickness that is at least sufficient to produce a stoichiometric proportion of metal and silicon atoms in the amorphous region of the gate of the MISFET device.

Abstract: A method for fabricating a plurality of shallow-junction metal oxide semiconductor field-effect transistors (MOSFETs) on a selected area of a silicon wafer, in the case in which the MOSFETs are spaced from one another by substantially transparent isolation elements. The method includes the step of flooding the entire selected area with laser radiation that is intended to effect the heating to a desired threshold temperature of only the selected depth of a surface layer of silicon that has been previously amorphized to this selected depth and then doped. This threshold temperature is sufficient to melt amorphized silicon but is insufficient to melt crystalline silicon.

Abstract: Pre-amorphization of a surface layer of crystalline silicon to an ultra-shallow (e.g., less than 100 nm) depth provides a solution to fabrication problems including (1) high thermal conduction in crystalline silicon and (2) shadowing and diffraction-interference effects by an already fabricated gate of a field-effect transistor on incident laser radiation. Such problems, in the past, have prevented prior-art projection gas immersion laser doping from being effectively employed in the fabrication of integrated circuits comprising MOS field-effect transistors employing 100 nm and shallower junction technology.

Abstract: The method of this invention produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes the steps of producing an amorphous region on the silicon body using ion implantation, for example, forming or positioning a metal such as titanium, cobalt or nickel in contact with the amorphous region, and irradiating the metal with intense light from a laser source, for example, to cause metal atoms to diffuse into the amorphous region. The amorphous region thus becomes an alloy region with the desired silicide composition. Upon cooling after irradiation, the alloy region becomes partially crystalline. To convert the alloy region into a more crystalline form, the invented method preferably includes a step of treating the alloy region using rapid thermal annealing, for example.