Abstract: A semiconductor device includes a first transistor and a first gate electrically coupled to the first transistor. A second transistor is positioned on top of the first transistor. A second gate is electrically coupled to the second transistor. A dielectric isolation layer is positioned between the first gate and the second gate. A first conductive contact is electrically coupled to the first gate. A second conductive contact is electrically coupled to the second gate. A control of the first gate through the first conductive contact is independent of a control of the second gate through the second conductive contact.

Abstract: A controller of a RAN detects an interferer is present in a region covered by antenna array(s) that provide a 3D view of segments of a cell, using at least a mapping from the segments to corresponding anomaly signatures, and using radio measurements taken in the segments, to determine segment(s) affected by the interferer. The controller performs mitigation of interference in the segment(s). A base station controlling the antenna array(s) determines that an event has been detected because radio measurement(s) of the segments of the cell meet an event detection threshold, and performs and sends to the controller multiple symbol-level radio measurements. The controller also causes channel sensing and radio measurements to be performed by the base station for steady state and states of interest in the cell. The controller correlates these radio measurements to map from segments to anomaly signatures and uses the mapping to perform interference mitigation.

Abstract: A semiconductor device includes a field effect transistor (FET). The FET includes a gate and a first source or drain (S/D) region. A frontside S/D contact may be connected to and extend vertically upward from a top surface of the first S/D region. The FET further includes a second S/D region. The second S/D region includes a conduit liner and an inner column internal to the conduit liner that extends below a bottom surface of the wraparound gate. A backside S/D contact may be connected to and extend vertically downward from a bottom surface of the second S/D region.

Abstract: A semiconductor device includes a nanostructure field effect transistor (FET). The FET includes a gate and a first source or drain (S/D) region. A frontside S/D contact may be connected to and extends vertically upward from a top surface of the first S/D region. The FET further includes a second S/D region. The second S/D region extends below a bottom surface of the gate. A backside S/D contact may be connected to and extend vertically downward from a bottom surface of the second S/D region.

Abstract: A semiconductor device includes a frontside including first metal structures, transistors disposed between the frontside and a backside opposite the frontside, each transistor including a source/drain positioned within a stack of nanolayers, the stack of nanolayers forming a gate structure and a power circuit on the backside and connected to the transistors by backside contacts. A backside dielectric isolation has a horizontal portion along a backside of the gate structure and a vertical portion substantially perpendicular to the backside and self-aligned to selected source/drains to electrically isolate the power circuit from the transistors.

Abstract: A semiconductor structure including a first dielectric layer comprising a first conductive metal feature embedded in the first dielectric layer; and a second dielectric layer including a second conductive metal feature embedded in the second dielectric layer, the second conductive metal feature is above and directly contacts the first conductive metal feature, and an interface between the second conductive metal feature and the second dielectric layer includes a repeating scallop shape along its entire length.

Abstract: Embodiments of the invention include a transistor comprising a gate region and an epitaxial region, the transistor comprising a frontside opposite a backside.

Abstract: Method of analysis text message syntactically and by content, which entails: step 1; Split syntaxes (made available to subscribers by the network operator) into tokens to store in a Syntax Trie; step 2. Pre-process an incoming text from a subscriber; step 3. Split the text (pre-processed in Step 2) into tokens; step 4. Look up paths that include the tokens (obtained in Step 3) in the Syntax Trie (initialized in Step 1); step 5: Return the look-up result, which is the path in the Syntax Trie that best reflects the user intent.

Abstract: A semiconductor fabrication method that uses a graphene etch stop is disclosed. The method comprises forming a first set of trenches and a second set of trenches in a substrate. The first set of trenches are narrower than the second set of trenches. The method further comprises forming a graphene layer in the first and second sets of trenches. The method further comprises depositing a first conductor in the first and second sets of trenches. The method further comprises removing the first conductor from the second set of trenches using an etching process. The graphene layer acts as an etch stop for the etching process. The method further comprises depositing a second conductor in the second set of trenches. The second conductor is different than the first conductor.

Abstract: A method for preventing or combating a fungal infection on a stone fruit tree or a part thereof includes applying Trichoderma atroviride strain SC1 to the tree, the part thereof, or a locus of the tree. The Trichoderma atroviride strain SC1 is useful in the prevention or combat of a fungal infection on a stone fruit tree or a part thereof.

Abstract: An example method includes hosting, by a conference provider, a virtual conference between a plurality of client devices exchanging audio streams; receiving, during the virtual conference, a first plurality of audio segments of a first audio stream from a first client device of the plurality of client devices; receiving, during the virtual conference, a second plurality of audio segments of a second audio stream from a second client device of the plurality of client devices; transcribing, by a transcription process, the first plurality of audio segments to create a first transcription; transcribing, by the transcription process, the second plurality of audio segments to create a second transcription; providing, during the virtual conference, the first transcription and the second transcription to the first and second client devices.

Abstract: Novel boron-modified hemp-based carbon and a method for making such comprises pretreating hemp precursors with boron and a catalyst to obtain boron-modified hemp that is carbonized to provide the novel boron-modified hemp-based carbon that in certain embodiments has a porous structure and chemical properties that are suitable for energy storage devices, especially metal-sulfur batteries; for example, the carbon, when used in a lithium-sulfur battery, can restrain polysulfide diffusion.

Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.

Abstract: A display may include illumination optics, a ferroelectric liquid crystal on silicon (fLCOS) panel, and a waveguide. The illumination optics may produce linear polarized illumination light that is modulated by the fLCOS panel to produce image light. The illumination optics may include light emitters that emit respective wavelengths of the illumination light. The illumination optics may include an X-plate that outputs the illumination light by combining the light emitted by the light emitters. Polarization recycling structures may be optically interposed between each of the light emitters and the X-plate. The polarization recycling structures may include a reflective polarizer. If desired, the polarizing recycling structures may also include a quarter waveplate. The polarization recycling structures may serve to minimize the amount of light lost in producing linearly polarized illumination light for the fLCOS display panel, thereby maximizing the optical efficiency of the display.

Abstract: An electronic device may have a display with an array of display pixels. To increase the efficiency of the display, the display may also include an array of microlenses. Each microlens may overlap and focus light from a respective pixel. Pixels for one of the colors of light may have a high aspect ratio. These pixels may be covered by two microlenses or a single cylindrical microlens. The microlens dimensions may be tuned to mitigate non-uniformities in the brightness profiles of the pixels. The microlens edges may be laterally shifted towards or away from the center of the light-emitting areas to either reduce or increase the focusing power of the microlens. The microlenses and color filter elements in each pixel may also be shifted to account for the chief ray angle of the display.

Abstract: A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.

Abstract: An exemplary semiconductor structure includes a semiconductor substrate; a plurality of metal lines on top of the semiconductor substrate, each line having a line width 5 nanometers or less: a plurality of dielectric features adjacent to the metal lines; and a plurality of metal vias on top of the metal lines. Out of a random sample of 1000 vias at least 950 vias are fully-aligned to corresponding metal lines.

Abstract: A method of selectively forming a cover layer is provided. The method includes exposing a surface of a metal feature and a surface of a dielectric layer to a plasma treatment, and exposing the surface of a metal feature and a surface of a dielectric layer to an inhibitor species to form an inhibitor layer selectively on the surface of the metal feature. The method further includes polymerizing the inhibitor layer to form an inhibiting film, and forming the cover layer on the surface of the dielectric layer.

Abstract: A method of forming a fully-aligned via (FAV) structure is provided. The method includes arranging conductive material adjacent to a dielectric pad and chemically deactivating a surface of the conductive material by forming a dopant-free surface-aligned monolayer (SAM) thereon. Dielectric material is deposited onto the dielectric pad aside the dopant-free SAM and the dopant-free SAM is removed from the surface of the conductive material.

Abstract: Self-aligned semiconductor device structures and techniques for fabrication thereof are provided. In one aspect, a self-aligned semiconductor device structure includes: at least one first conductive element embedded in a first dielectric; a second dielectric disposed selectively on the first dielectric relative to the at least one first conductive element; and at least one second conductive element present in the second dielectric that is fully aligned with the at least one first conductive element. A liner can be disposed on the second dielectric and which separates the second dielectric from the at least one second conductive element. A method of forming a self-aligned semiconductor device structure is also provided.