Abstract: In a method of demapping a tributary from a first frame into a second frame, the first frame has a plurality of tributary words and a synchronization word, and first and second counters are provided. The first counter is increased by a first value at each dock cycle of the second frame, and reading operations are performed according to the second counter. Synchronization information, generated according to the synchronization word, is used to change between first and second states. When in the first state, the second counter is synchronized to the first counter at each clock cycle of the second frame; and, when in the second state, the second counter is synchronized to the first counter at a predetermined instant of the second frame, the second counter increasing by a second value at each clock cycle of the second frame wherein the reading operation is performed.

Abstract: A method for performing an iterative n-dimensional decoding of a data structure comprising a data bit frame. The method includes receiving possibly errored data; computing syndromes in all the n dimensions in a single step; storing the first calculated syndromes; processing syndromes in a first dimension; correcting errors; and updating the syndromes which have been affected by the correction in the first dimension; and processing syndromes in all the possible dimensions up to the n-th one and, for each of the processed syndromes, correcting errors and updating the syndromes in all the dimensions which have been affected by the correction. The time required by each sub-iteration (from second sub-iteration on) will be progressively reduced. The number of iterations is increased without increasing the delay and processing complexity.

Abstract: Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.

Abstract: It is disclosed a method of demapping a tributary from a first frame into a second frame, the first frame comprising a plurality of tributary words and a synchronization word, the method comprising: providing a first and a second counters; increasing the first counter by a first value at each clock cycle of the second frame; and performing reading operations according to the second counter. It further comprises: generating synchronization information according to the synchronization word; according to the synchronization information, performing a change of state between a first state and a second state, wherein, in the first state, the second counter is synchronized to the first counter at each clock cycle of the second frame, and in the second state, the second counter is synchronized to the first counter at a predetermined instant of the second frame and the second counter is increased by a second value at each clock cycle of the second frame wherein the reading operation is performed.

Abstract: It is disclosed a mapper for mapping a tributary from a first frame into a second frame. The mapper comprises: a first register for generating a first counter which is adapted to be increased by a first value at each clock cycle of the first frame; a second register for generating a second counter which is adapted to be increased by a second value at each clock cycle of the second frame; a difference module for calculating a phase error between the first counter and the second counter; and a frame generation module, responsive to the phase error, for mapping the tributary into the second frame.

Abstract: Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.

Abstract: Disclosed is a method for performing an iterative n-dimensional decoding of a data structure comprising a data bit frame. The method comprises the steps of: receiving possibly errored data; computing syndromes in all the n dimensions in a single step; storing the first calculated syndromes; processing syndromes in a first dimension; correcting errors; and updating the syndromes which have been affected by the correction in said first dimension; and processing syndromes in all the possible dimensions up to the n-th one and, for each of the processed syndromes, correcting errors and updating the syndromes in all the dimensions which have been affected by the correction. The time required by each sub-iteration (from second sub-iteration on) will be progressively reduced. The number of iterations is increased without increasing the delay and processing complexity. Processing complexity is reduced because only one circuit is used for processing the syndromes in all the dimensions and for all the iterations.