Patents by Inventor Soo Seong Lee

Soo Seong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120243
    Abstract: A circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer and including a cavity; and a plurality of pads disposed on the first insulating layer and having top surfaces exposed through the cavity; wherein the cavity of the second insulating layer includes: a bottom surface positioned higher than a top surface of the first insulating layer; and an inner wall extending from the bottom surface, wherein the inner wall is perpendicular to top or bottom surface of the second insulating layer, wherein the bottom surface of the cavity includes: a first bottom surface positioned lower than a top surface of the pad and positioned outside an arrangement region of the plurality of pads; and a second bottom surface positioned lower than the top surface of the pad and positioned inside the arrangement region of the plurality of pads, and wherein a height of the first bottom surface is different from a height of the second bottom surface.
    Type: Application
    Filed: April 26, 2021
    Publication date: April 11, 2024
    Inventors: Jong Bae SHIN, Moo Seong KIM, Soo Min LEE, Jae Hun JEONG
  • Publication number: 20120210457
    Abstract: The present invention relates to a method for breeding a novel plant variety of high fertility xBrassicoraphanus with stabilized seed productivity, and discloses a method for breeding a novel plant variety of xBrassicoraphanus, which involves performing a mutagen treatment on xBrassicoraphanus seeds by treating the xBrassicoraphanus seeds with 0.01 ?g/L of mutagen NMU, sowing the xBrassicoraphanus seeds, gathering the xBrassicoraphanus seeds, sowing the xBrassicoraphanus seeds again, performing artificial crossing in an indoor area to check seed productivity, and checking the uniformity of the variety using an AFLP primer.
    Type: Application
    Filed: March 12, 2010
    Publication date: August 16, 2012
    Inventor: Soo-Seong Lee
  • Patent number: 5929675
    Abstract: A power applying circuit for an internal logic circuit includes a plurality of basic power applying units coupled to the internal logic circuit in parallel, each of the basic power applying units including a logic gate unit outputting a pulse in response to two input signals having a time interval with respect to each other, and a transmission gate coupled to the logic gate unit and receiving the pulse.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: July 27, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Soo Seong Lee