Abstract: An image recognition method includes the steps of: for a deep learning network that carries out object recognition on a random image, carrying out quantization corresponding to the number of a plurality of different bits to generate a plurality of quantization models respectively corresponding to the number of bits; receiving image data as an input for the deep learning network; determining the uncertainty of the input image data; selecting any one of the plurality of quantization models on the basis of the determined uncertainty; and recognizing an object from the image data by using the selected quantization model, and outputting, as the result of the object recognition, a label corresponding to the image data.

Abstract: A swizzle pattern generator is provided to reduce an overhead due to execution of a swizzle instruction in vector processing. The swizzle pattern generator is configured to provide swizzle patterns with respect to data sets of at least one vector register or vector processing unit. The swizzle pattern generator may be reconfigurable to generate various swizzle patterns for different vector operations.

Abstract: A texture processing method and apparatus that obtains information about a first data loss amount that occurred during a texture compression process. A determination is made regarding a second data loss amount that allowable during a texture filtering process based on the obtained information regarding the first data loss amount. Texture filtering is then performed by using the second data loss amount. At least one processor determines the second data loss amount based on a difference between the third data loss amount and the first data loss amount.

Abstract: An apparatus and a job scheduling method are provided. For example, the apparatus is a multi-core processing apparatus. The apparatus and method minimize performance degradation of a core caused by sharing resources by dynamically managing a maximum number of jobs assigned to each core of the apparatus. The apparatus includes at least one core including an active cycle counting unit configured to store a number of active cycles and a stall cycle counting unit configured to store a number of stall cycles and a job scheduler configured to assign at least one job to each of the at least one core, based on the number of active cycles and the number of stall cycles. When the ratio of the number of stall cycles to a number of active cycles for a core is too great, the job scheduler assigns fewer jobs to that core to improve performance.

Abstract: A method of processing a graphics pipeline in a graphics processing apparatus includes performing pixel shading to process pixels corresponding to an object, texturing the object, and transmitting data of a textured object to a processing path for a post-processing operation of the textured object. A graphics processing apparatus for processing a graphics pipeline includes a shading processor configured to perform pixel shading to process pixels corresponding to an object. A texturing processor is configured apply to texture the object, determine a post-processing operation mode to adjust visual effects of the textured object, and transmit data of the textured object to a processing path for the post-processing operation in accordance with the determined post-processing mode. A reorder buffer is configured to buffer data of the object in accordance with a processing order when the processing path bypasses the shading processor.

Abstract: A swizzle pattern generator is provided to reduce an overhead due to execution of a swizzle instruction in vector processing. The swizzle pattern generator is configured to provide swizzle patterns with respect to data sets of at least one vector register or vector processing unit. The swizzle pattern generator may be reconfigurable to generate various swizzle patterns for different vector operations.

Abstract: Provided is a method of rendering a curve. The method includes determining a tessellation level of dividing a curve based on a control point of the curve, generating at least one triangle and at least two first sub-curves corresponding to the curve based on the tessellation level, and rendering the at least two first sub-curves and the at least one triangle.

Abstract: Embodiments include a processor capable of supporting multi-mode and corresponding methods. The processor includes front end units, a number of processing elements more than a number of the front end units; and a controller configured to determine if thread divergence occurs due to conditional branching. If there is thread divergence, the processor may set control information to control processing elements using currently activated front end units. If there is not, the processor may set control information to control processing elements using a currently activated front end unit.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: A method of processing a graphics pipeline in a graphics processing apparatus includes performing pixel shading to process pixels corresponding to an object, texturing the object, and transmitting data of a textured object to a processing path for a post-processing operation of the textured object. A graphics processing apparatus for processing a graphics pipeline includes a shading processor configured to perform pixel shading to process pixels corresponding to an object. A texturing processor is configured apply to texture the object, determine a post-processing operation mode to adjust visual effects of the textured object, and transmit data of the textured object to a processing path for the post-processing operation in accordance with the determined post-processing mode. A reorder buffer is configured to buffer data of the object in accordance with a processing order when the processing path bypasses the shading processor.

Abstract: A texture processing method and apparatus that obtains information about a first data loss amount that occurred during a texture compression process. A determination is made regarding a second data loss amount that allowable during a texture filtering process based on the obtained information regarding the first data loss amount. Texture filtering is then performed by using the second data loss amount. At least one processor determines the second data loss amount based on a difference between the third data loss amount and the first data loss amount.

Abstract: Provided is a method of rendering a curve. The method includes determining a tessellation level of dividing a curve based on a control point of the curve, generating at least one triangle and at least two first sub-curves corresponding to the curve based on the tessellation level, and rendering the at least two first sub-curves and the at least one triangle.

Abstract: The present examples relate to prefetching, and to a cache control device for prefetching and a prefetching method using the cache control device, wherein the cache control device analyzes a memory access pattern of program code, inserts, into the program code, a prefetching command generated by encoding the analyzed access pattern, and executes the prefetching command inserted into the program code in order to prefetch data into a cache, thereby maximizing prefetching efficiency.

Abstract: A functional unit for supporting multithreading, a processor including the same, and an operating method of the processor are provided. The functional unit for supporting multithreading includes a plurality of input ports configured to receive opcodes and operands for a plurality of threads, wherein each of the plurality of input ports is configured to receive an opcode and an operand for a different thread, a plurality of operators configured to perform operations using the received operands, an operator selector configured to select, based on each opcode, an operator from among the plurality of operators to perform a specific operation using an operand from among the received operands, and a plurality of output ports configured to output operation results of operations for each thread.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.

Abstract: An apparatus and method for graphics state management. The apparatus for graphics state management includes a state version manager configured to manage changes in graphics state versions by allocating or deallocating a memory for each of graphics states based on a page of a predetermined size, wherein the state version manager allocates or deallocates pages for each of the graphics state versions by using a string of binary values that indicates the respective reference states of each of those pages.

Abstract: Provided are an apparatus and method for providing instructions for a heterogeneous processor having heterogeneous components supporting different data widths. Respective data widths of operands and connections in a data flow graph are determined by using type information of operands. Instructions, to be executed by the heterogeneous processor, are provided based on the determined data widths.

Abstract: Provided is a method of processing a texture. The method includes acquiring texture position information in a texture image corresponding to pixel position information of pixels constituting a frame, acquiring texture classification information (TCI) representing a similarity between respective texture factors of two or more classified regions in the texture image based on the texture position information, determining an amount of texture data requested from a memory according to the TCI, and reading texture data corresponding to the determined amount of texture data based on the texture position information.

Abstract: An apparatus and a job scheduling method are provided. For example, the apparatus is a multi-core processing apparatus. The apparatus and method minimize performance degradation of a core caused by sharing resources by dynamically managing a maximum number of jobs assigned to each core of the apparatus. The apparatus includes at least one core including an active cycle counting unit configured to store a number of active cycles and a stall cycle counting unit configured to store a number of stall cycles and a job scheduler configured to assign at least one job to each of the at least one core, based on the number of active cycles and the number of stall cycles. When the ratio of the number of stall cycles to a number of active cycles for a core is too great, the job scheduler assigns fewer jobs to that core to improve performance.