Patents by Inventor Soon Il Yeo

Soon Il Yeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9642292
    Abstract: Provided is an electromagnetic wave reduction apparatus for reducing an electromagnetic wave generated from a thermoelectric element. The electromagnetic wave reduction apparatus according to the present invention includes an electromagnetic wave sensing unit connected to a thermoelectric element and sensing an electromagnetic wave, an electromagnetic wave detecting unit detecting whether the sensed electromagnetic wave is greater than a reference value, an electromagnetic wave reduction circuit unit reducing the electromagnetic wave in response to an electromagnetic wave reduction control signal, and a circuit operation control unit generating the electromagnetic wave reduction control signal according to the detection result.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: May 2, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Soon Il Yeo
  • Patent number: 9494633
    Abstract: Provided is an electromagnetic interference (EMI) measuring device. The EMI measuring device according to the present invention includes an electromagnetic wave eliminating unit eliminating remaining electromagnetic waves from a DUT in response to an eliminating control signal of the control unit. The control unit may calculate EMI of the DUT on the basis of a measured result measured before the elimination of remaining electromagnetic waves. The EMI measuring device according to the present invention may compensate for an error due to remaining electromagnetic waves and measure EMI at high accuracy.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: November 15, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Soon Il Yeo
  • Publication number: 20150208558
    Abstract: Provided is an electromagnetic wave reduction apparatus for reducing an electromagnetic wave generated from a thermoelectric element. The electromagnetic wave reduction apparatus according to the present invention includes an electromagnetic wave sensing unit connected to a thermoelectric element and sensing an electromagnetic wave, an electromagnetic wave detecting unit detecting whether the sensed electromagnetic wave is greater than a reference value, an electromagnetic wave reduction circuit unit reducing the electromagnetic wave in response to an electromagnetic wave reduction control signal, and a circuit operation control unit generating the electromagnetic wave reduction control signal according to the detection result.
    Type: Application
    Filed: August 5, 2014
    Publication date: July 23, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Soon Il YEO
  • Patent number: 9035660
    Abstract: Disclosed are a jig for measuring EMC of a semiconductor chip and a method for measuring EMC that can accurately measure the EMC at a semiconductor chip level. The jig for measuring EMC of a semiconductor chip according to the exemplary embodiment of the present disclosure includes: a chip mount unit on which the semiconductor chip for which the EMC is to be measured is mounted; a memory unit configured to store EMC information of components in a system in which the semiconductor chip is used; and a measurement control unit configured to extract the EMC information stored in the memory unit and provide the extracted EMC information to the chip mount unit at the time of measuring the EMC of the semiconductor chip.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: May 19, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Soon Il Yeo
  • Patent number: 9031774
    Abstract: The present invention provides an apparatus and method for predicting a moving direction of another vehicle running on a carriageway adjacent to a user's vehicle using periodically acquired image information around the user's vehicle, and performing a control process of preventing collision of the user's vehicle when a moving direction of the user's vehicle crosses the moving direction of the other vehicle.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: May 12, 2015
    Assignees: Electronics and Telecommunications Research Institute, Andong University Industry-Academic Cooperation Foundation
    Inventors: Jung Hee Suk, Ik Jae Chun, Chun Gi Lyuh, Soon Il Yeo, Wook Jin Chung, Jeong Hwan Lee, Jae Chang Shim, Tae Moon Roh
  • Patent number: 8786298
    Abstract: Disclosed are a method and an apparatus of near field scan calibration, and more particularly, a method and an apparatus for near field scan calibration for calibrating a characteristic of an antenna for near field scan measurement of a semiconductor chip. The apparatus for near field scan calibration includes: a plane-type text fixture having a plane shape; an antenna positioned spaced apart from the plane-type test fixture by a set spacing distance and acquiring data including a magnetic field; and a spectrum analyzer analyzing the data acquired by the antenna.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: July 22, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Soon Il Yeo, Jae Kyung Wee, Pil Soo Lee
  • Publication number: 20140167782
    Abstract: Provided is an electromagnetic interference (EMI) measuring device. The EMI measuring device according to the present invention includes an electromagnetic wave eliminating unit eliminating remaining electromagnetic waves from a DUT in response to an eliminating control signal of the control unit. The control unit may calculate EMI of the DUT on the basis of a measured result measured before the elimination of remaining electromagnetic waves. The EMI measuring device according to the present invention may compensate for an error due to remaining electromagnetic waves and measure EMI at high accuracy.
    Type: Application
    Filed: September 16, 2013
    Publication date: June 19, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Soon Il Yeo
  • Patent number: 8697491
    Abstract: A semiconductor package is provided. The semiconductor package includes a package body, a plurality of semiconductor chips, and an external connection terminal. The package body is stacked with a plurality of sheets where conductive patterns and vias are disposed. The plurality of semiconductor chips are inserted into insert slots extending from one surface of the package body. The external connection terminal is provided on other surface opposite to the one surface of the package body. Here, the plurality of semiconductor chips are electrically connected to the external connection terminal.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: April 15, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Woojin Chang, Soon Il Yeo, Hae Cheon Kim, Eun Soo Nam
  • Patent number: 8683397
    Abstract: Disclosed are a method and an apparatus of designing a semiconductor chip. The disclosed method includes the steps of: storing a plurality of EMS (Electro Magnetic Susceptibility) semiconductor IPs (Intellectual Property) and a plurality of EMI (Electro Magnetic Interference) semiconductor IPs; selecting a proper semiconductor IP from among the plurality of EMS shielding semiconductor IPs in a case of an input pin, and selecting a proper semiconductor IP from among the plurality of EMI shielding semiconductor IPs in a case of an output pin; and designing the semiconductor chip by disposing the selected semiconductor IP.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 25, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Soon Il Yeo, Young Ho Kim
  • Patent number: 8643999
    Abstract: Provided is an Electromagnetic Interference (EMI) reduction apparatus. The EMI reduction apparatus includes: an electromagnetic wave absorbing unit absorbing electromagnetic waves from an electromagnetic wave generator and converting the absorbed electromagnetic waves into thermal energy through thermal conversion and emitting the thermal energy; and a thermoelectric unit converting the emitted thermal energy into electric energy.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: February 4, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Soon Il Yeo
  • Patent number: 8304895
    Abstract: A semiconductor package is provided. The semiconductor package includes a package body, a plurality of semiconductor chips, and an external connection terminal. The package body is stacked with a plurality of sheets where conductive patterns and vias are disposed. The plurality of semiconductor chips are inserted into insert slots extending from one surface of the package body. The external connection terminal is provided on other surface opposite to the one surface of the package body. Here, the plurality of semiconductor chips are electrically connected to the external connection terminal.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: November 6, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Woojin Chang, Soon Il Yeo, Hae Cheon Kim, Eun Soo Nam
  • Publication number: 20120161803
    Abstract: Disclosed are a method and an apparatus of near field scan calibration, and more particularly, a method and an apparatus for near field scan calibration for calibrating a characteristic of an antenna for near field scan measurement of a semiconductor chip. The apparatus for near field scan calibration includes: a plane-type text fixture having a plane shape; an antenna positioned spaced apart from the plane-type test fixture by a set spacing distance and acquiring data including a magnetic field; and a spectrum analyzer analyzing the data acquired by the antenna.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 28, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: SOON IL YEO, Jae Kyung Wee, Pil Soo Lee
  • Patent number: 8166328
    Abstract: Provided is a low power consumption processor. The processor includes: a plurality of blocks; a memory storing instructions that control each of the plurality of blocks; and a multi power controller generates a signal that activates at least one of the plurality of blocks according to an address storing the instruction, and provides a normal power voltage or a reduction power voltage in response to the activation signal.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: April 24, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yil-Suk Yang, Tae-Moon Roh, Soon-Il Yeo, Jung-Hee Suk, Chun-Gi Lyuh, Ik-Jae Chun, Se-Wan Heo, Jong-Dae Kim
  • Publication number: 20120044664
    Abstract: Provided is an Electromagnetic Interference (EMI) reduction apparatus. The EMI reduction apparatus includes: an electromagnetic wave absorbing unit absorbing electromagnetic waves from an electromagnetic wave generator and converting the absorbed electromagnetic waves into thermal energy through thermal conversion and emitting the thermal energy; and a thermoelectric unit converting the emitted thermal energy into electric energy.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 23, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Soon Il YEO
  • Publication number: 20110144859
    Abstract: The present invention provides an apparatus and method for predicting a moving direction of another vehicle running on a carriageway adjacent to a user's vehicle using periodically acquired image information around the user's vehicle, and performing a control process of preventing collision of the user's vehicle when a moving direction of the user's vehicle crosses the moving direction of the other vehicle.
    Type: Application
    Filed: May 13, 2010
    Publication date: June 16, 2011
    Applicants: Electronics and Telecommunications Research Institue, Andong University Industry-Academic Cooperation Foundation
    Inventors: Jung Hee SUK, Ik Jae CHUN, Chun Gi LYUH, Soon Il YEO, Wook Jin CHUNG, Jeong Hwan LEE, Jae Chang SHIM, Tae Moon ROH
  • Patent number: 7958179
    Abstract: Provided are an arithmetic method and device of a reconfigurable processor. The arithmetic device includes: an Arithmetic Logic Unit (ALU) for performing an addition and subtraction operation and a logic operation of a binary signal; a multiplier for performing a multiplication operation of the binary signal; a shifter for changing an arrangement of the binary signal; a first operand selector and a second operand selector each for selecting one of values output from the ALU, the multiplier, and the shifter; and an adder for adding the values selected by the first operand selector and the second operand selector.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: June 7, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chun Gi Lyuh, Soon Il Yeo, Tae Moon Roh, Jong Dae Kim
  • Publication number: 20100257342
    Abstract: Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.
    Type: Application
    Filed: June 17, 2010
    Publication date: October 7, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chun Gi LYUH, Yil Suk YANG, Se Wan HEO, Soon Il YEO, Tae Moon ROH, Jong Dae KIM, Ki Chul KIM, Se Hoon YOO
  • Patent number: 7805620
    Abstract: Provided is a highly energy-efficient processor architecture. The architecture employs 2-stage dynamic voltage scaling (DVS) and a sleep mode for high energy efficiency, dynamically controls the power supply voltage and activation of an embedded processor with instructions, and thus can prevent performance deterioration while reducing power consumption.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: September 28, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yil Suk Yang, Jong Dae Kim, Soon Il Yeo, Chun Gi Lyuh
  • Patent number: 7793006
    Abstract: Provided are an apparatus and a method of managing a reconfiguration data memory. A space for a memory that stores configuration data used for reconfiguration of a target system is not provided in the target system. Instead the configuration data is stored in a separate server and, if required, the configuration data is transmitted to the target system through an Internet. Data that should be preserved after the reconfiguration among data contents stored in SoC internal and external memories of the target system is transferred to the server. The emptied space of the SoC internal and external memories is used as a configuration memory. After the reconfiguration, the preservation data is returned to its original position in the memories.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: September 7, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Soon Il Yeo, Myung Shin Kwak, Jong Dae Kim
  • Patent number: 7769981
    Abstract: Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: August 3, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chun Gi Lyuh, Yil Suk Yang, Se Wan Heo, Soon Il Yeo, Tae Moon Roh, Jong Dae Kim, Ki Chul Kim, Se Hoon Yoo