Patents by Inventor Soon Lim

Soon Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11997271
    Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: May 28, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh, Chong Soon Lim, Sughosh Pavan Shashidhar, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Jing Ya Li
  • Patent number: 11994605
    Abstract: Provided is a direction of arrival estimation device wherein: a calculation circuit calculates a frequency weighting factor for each of a plurality of frequency components of signals recorded in a microphone array, on the basis of the differences among unit vectors indicating the directions of the sound sources of each of the plurality of frequency components; and an estimation circuit estimates the direction of arrival of a signal from the sound source, on the basis of the frequency weighting factors.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: May 28, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Rohith Mars, Srikanth Nagisetty, Chong Soon Lim, Hiroyuki Ehara, Akihisa Kawamura
  • Publication number: 20240167954
    Abstract: Devices and methods are described for a contrast tray and framing devices for use with imagers. Some embodiments describe a contrast tray for use with an imager comprising one or more light diffusing layers configured to shift at least some of an imaging light and one or more light filtering layers configured to filter out at least some of the imaging light. Light diffusing and light filtering layers can be further configured to upconvert at least some of the diffused and/or non-filtered light. Contrast trays can be used to improve imaging of gels such as PAGE gels when using a green or blue-green light. Other embodiments of the disclosure describe a framing device that provides better illumination and lower background fluorescence for fluorescent gels, such as nucleic acid gels.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 23, 2024
    Applicants: Pierce Biotechnology, Inc., Life Technologies Holdings PTE Limited
    Inventors: Janaki Narahari, Aaron McBride, Chee Wai Chan, Gregory Kilmer, Paul Haney, Beng Heng Lim, Serina Perry, Soo Yong Lau, Zhixiong Tay, Yu Soon Su, Wei Guang Lee
  • Publication number: 20240163421
    Abstract: The image encoding device switches, based on one or more parameters related to an object in an image, between an encoding process for (i) a first region of the image including the object and (ii) a second region of the image that does not include the object, the one or more parameters being input from a first processing device that executes a prescribed task process on a basis of the image, generates a bitstream, and transmits the bitstream to an image decoding device.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 16, 2024
    Inventors: Han Boon TEO, Chong Soon LIM, Chu Tong WANG, Tadamasa TOMA
  • Publication number: 20240161796
    Abstract: Described apparatuses and methods enable communication between a host device and a memory device to establish relative delays between different data lines. If data signals propagate along a bus with the same timing, simultaneous switching output (SSO) and crosstalk can adversely impact channel timing budget parameters. An example system includes an interconnect having multiple data lines that couple the host device to the memory device. In example operations, the host device can transmit to the memory device a command indicative of a phase offset between two or more data lines of the multiple data lines. The memory device can implement the command by transmitting or receiving signals via the interconnect with different relative phase offsets between data lines. The host device (e.g., a memory controller) can determine appropriate offsets for a given apparatus. Lengths of the offsets can vary. Further, a system can activate the phase offsets based on frequency.
    Type: Application
    Filed: January 23, 2024
    Publication date: May 16, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, Timothy M. Hollis, Dong Soon Lim
  • Publication number: 20240163431
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11984356
    Abstract: A semiconductor device with liner-free contact structures and a method of fabricating the same are disclosed. The method includes forming first and second source/drain (S/D) regions on first and second fin structures, forming a first dielectric layer between the first and second S/D regions, forming first and second gate-all-around (GAA) structures on the first and second fin structures, forming a second dielectric layer on the first and second GAA structures and the first dielectric layer, forming a tapered trench opening in the second dielectric layer and on the first and second GAA structures and the first dielectric layer, selectively forming a seed layer on top surfaces of the first and second GAA structures and the first dielectric layer that are exposed in the tapered trench opening, and selectively depositing a conductive layer on the seed layer to fill the tapered trench opening.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Peng-Soon Lim, Chung-Liang Cheng, Huang-Lin Chao
  • Patent number: 11985349
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 14, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Patent number: 11985350
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 14, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Patent number: 11978394
    Abstract: A display device includes: a first partial emission driver configured to provide first emission control signals to a first partial panel area of the display panel, and a second partial emission driver configured to provide second emission control signals to a second partial panel area of the display panel; and a power management block configured to: provide a first voltage and a second voltage to the emission driver, in response to the first partial emission driver generating the first emission control signals; and provide a third voltage and a fourth voltage to the emission driver in response to the second partial emission driver generating the second emission control signals; and an emission control block configured to receive the first voltage and the second voltage from the power management block and to provide a first clock signal and a second clock signal to the emission driver.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: May 7, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Taehoon Kim, Soon-Dong Kim, Jaekeun Lim, Joon-Chul Goh, Bonghyun You
  • Publication number: 20240146947
    Abstract: An encoder includes circuitry and memory. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Inventors: Che-Wei KUO, Jing Ya LI, Chong Soon LIM, Han Boon TEO, Hai Wei SUN, Rohith MARS, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20240130934
    Abstract: Disclosed is a bulk block for manufacturing a prosthesis having high aesthetics and processability required for one-day dental prosthetic materials, which is a dental composite bulk block comprising a glass ceramic matrix and a polymer, wherein the glass ceramic matrix consists of an amorphous glass matrix and a crystalline phase dispersed in the glass matrix, the crystalline phase comprises as a main crystalline phase at least one selected from a leucite crystalline phase and a lithium disilicate crystalline phase, and has an average particle diameter of 0.01-1.0 ?m, and the polymer is included in an amount of 20-40 wt % with respect to the weight of the total bulk block. The bulk block has the advantages of improved mechanical properties, being capable of preventing microleakage, exhibiting excellent aesthetics, and enabling machining.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 25, 2024
    Applicant: HASS CO., LTD.
    Inventors: Hyung Bong LIM, Sung Min KIM, Sung Ho HA, Moon Chang KIM, Hwan Soon KOH
  • Publication number: 20240129523
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 18, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11961564
    Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Yeon Yu, Kui-Han Ko, Il-Han Park, June-Hong Park, Joo-Yong Park, Joon-Young Park, Bong-Soon Lim
  • Patent number: 11962804
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 16, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Patent number: 11961825
    Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Aparna U. Limaye, Dong Soon Lim, Randon K. Richards, Owen R. Fay
  • Publication number: 20240121429
    Abstract: An image coding method includes: deriving a candidate for a motion vector of a current block from a co-located motion vector; adding the candidate to a list; selecting the motion vector of the current block from the list; and coding the current block, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Viktor WAHADANIAH, Chong Soon LIM, Sue Mon Thet NAING, Hai Wei SUN, Takahiro NISHI, Hisao SASAI, Youji SHIBAHARA, Kyoko TANIKAWA, Toshiyasu SUGIO, Kengo TERADA, Toru MATSUNOBU
  • Publication number: 20240121384
    Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 11, 2024
    Inventors: Jing Ya LI, Ru Ling Liao, Chong Soon Lim, Han Boon Teo, Hai Wei Sun, Che Wei Kuo, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11956467
    Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: RE49991
    Abstract: An image decoding method decodes a coded stream which includes processing units and a header of the processing units, and which is generated by coding a moving picture using inter prediction. The processing units includes at least one processing unit divided in a hierarchy, the hierarchy including a highest hierarchical layer in which a coding unit exists as a largest processing unit and a lower hierarchical layer in which a prediction unit exists. The method includes identifying, by parsing hierarchy depth information stored in the header and indicating a hierarchical layer higher than a lowest hierarchical layer in which a smallest prediction unit exits, a hierarchical layer which is indicated by the hierarchy depth information or a hierarchical layer higher than the indicated hierarchical layer. The hierarchical layer includes a prediction unit in which a reference index is stored. The prediction unit is decoded using the reference index.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: May 28, 2024
    Assignee: SUN PATENT TRUST
    Inventors: Hisao Sasai, Takahiro Nishi, Youji Shibahara, Chong Soon Lim, Viktor Wahadaniah, Xuan Jing, Sue Mon Thet Naing