Patents by Inventor Sreekiran Samala
Sreekiran Samala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240175977Abstract: A device, e.g., a radar transceiver, includes a receiver and a transmitter. One such device includes a phase shifter having a first input to receive an oscillating signal and a second input to receive a control signal. The device also includes a signal generator having a quadrature (Q) channel output to output a quadrature phase version of the oscillating signal; and a Q channel mixer having an input coupled to the Q channel output. A feedback path of the device includes a filter having an output and an input coupled to an output of the Q channel mixer, and an integrator having an input coupled to the output of the filter. The integrator has an output coupled to the second input of the phase shifter, in which the integrator outputs the control signal to the phase shifter.Type: ApplicationFiled: February 6, 2024Publication date: May 30, 2024Inventors: Sreekiran SAMALA, Venkatesh SRINIVASAN, Vijaya B. RENTALA
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Patent number: 11947031Abstract: A radar transceiver includes a receiver. The receiver includes a low noise amplifier a mixer, a baseband filter, an integrator, and a phase shifter. The mixer includes an input coupled to an output of the low noise amplifier. The baseband filter includes an input coupled to an output of the mixer. The integrator includes an input coupled to an output of the baseband filter. The phase shifter includes a control input and an output. The control input is coupled to an output of the integrator.Type: GrantFiled: November 12, 2019Date of Patent: April 2, 2024Assignee: Texas Instruments IncorporatedInventors: Sreekiran Samala, Venkatesh Srinivasan, Vijaya B. Rentala
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Patent number: 11789137Abstract: In described examples, a frequency modulated continuous wave (FMCW) synthesizer includes a control engine, and a phase locked loop (PLL) including a frequency divider, a control voltage generator (CVG), and a voltage controlled oscillator (VCO). The frequency divider modifies a VCO output frequency based on a control input. The CVG generates a control voltage based on a frequency reference and the frequency divider output. The VCO outputs a FMCW output having the VCO output frequency in response to the control voltage. The control engine generates the control input so that the VCO output frequency: from a first time to a second time, is a first frequency; from the second time to a third time, changes at a first rate; from the third time to a fourth time, changes at a second rate different from the first rate; and from the fourth time to a fifth time, is a second frequency.Type: GrantFiled: December 30, 2020Date of Patent: October 17, 2023Assignee: Texas Instruments IncorporatedInventors: Karthik Subburaj, Sreekiran Samala, Indu Prathapan
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Patent number: 11747436Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: GrantFiled: September 15, 2020Date of Patent: September 5, 2023Assignee: Texas Instruments IncorporatedInventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Patent number: 11486916Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.Type: GrantFiled: November 1, 2021Date of Patent: November 1, 2022Assignee: Texas Instmments IncorporatedInventors: Tom Altus, Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Publication number: 20220206133Abstract: In described examples, a frequency modulated continuous wave (FMCW) synthesizer includes a control engine, and a phase locked loop (PLL) including a frequency divider, a control voltage generator (CVG), and a voltage controlled oscillator (VCO). The frequency divider modifies a VCO output frequency based on a control input. The CVG generates a control voltage based on a frequency reference and the frequency divider output. The VCO outputs a FMCW output having the VCO output frequency in response to the control voltage. The control engine generates the control input so that the VCO output frequency: from a first time to a second time, is a first frequency; from the second time to a third time, changes at a first rate; from the third time to a fourth time, changes at a second rate different from the first rate; and from the fourth time to a fifth time, is a second frequency.Type: ApplicationFiled: December 30, 2020Publication date: June 30, 2022Inventors: Karthik Subburaj, Sreekiran Samala, Indu Prathapan
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Publication number: 20220050131Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.Type: ApplicationFiled: November 1, 2021Publication date: February 17, 2022Inventors: Tom Altus, Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Publication number: 20210356557Abstract: A radar transceiver includes a receiver. The receiver includes a low noise amplifier a mixer, a baseband filter, an integrator, and a phase shifter. The mixer includes an input coupled to an output of the low noise amplifier. The baseband filter includes an input coupled to an output of the mixer. The integrator includes an input coupled to an output of the baseband filter. The phase shifter includes a control input and an output. The control input is coupled to an output of the integrator.Type: ApplicationFiled: November 12, 2019Publication date: November 18, 2021Inventors: Sreekiran SAMALA, Venkatesh SRINIVASAN, Vijaya B. RENTALA
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Patent number: 11162986Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.Type: GrantFiled: October 9, 2019Date of Patent: November 2, 2021Assignee: Texas Instruments IncorporatedInventors: Tom Altus, Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Publication number: 20210011118Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: ApplicationFiled: September 15, 2020Publication date: January 14, 2021Inventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Patent number: 10809353Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: GrantFiled: August 28, 2018Date of Patent: October 20, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Patent number: 10746851Abstract: A testing device for FMCW radar includes an input for receiving a chirp signal generated by the radar. An IQ down-converter coupled to the input down-converts the chirp signal. A digitizer extracts digitized IQ signals from the down-converted chirp signal. A processor coupled to the digitizer determines at least one of frequency linearity and phase noise of the chirp signal.Type: GrantFiled: December 18, 2015Date of Patent: August 18, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Anjan Prasad Eswaran, Shankar Ram Narayanamoorthy, Sreekiran Samala, Karthik Subburaj
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Publication number: 20200041551Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.Type: ApplicationFiled: October 9, 2019Publication date: February 6, 2020Inventors: Tom Altus, Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Publication number: 20200025871Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: ApplicationFiled: August 28, 2018Publication date: January 23, 2020Inventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Patent number: 10481187Abstract: A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.Type: GrantFiled: December 31, 2014Date of Patent: November 19, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tom Altus, Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Patent number: 10101438Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: GrantFiled: April 15, 2015Date of Patent: October 16, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Publication number: 20180074168Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.Type: ApplicationFiled: April 15, 2015Publication date: March 15, 2018Inventors: Karthik Subburaj, Karthik Ramasubramanian, Sriram Murali, Sreekiran Samala, Krishnanshu Dandu
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Patent number: 9696359Abstract: A method of measuring phase noise (PN). A PLL frequency synthesizer is provided including a first phase frequency detector (PFD) receiving a reference frequency signal coupled to a first charge pump (CP) coupled to a VCO having an output fedback to the first PFD through a feedback divider that provides a divided frequency signal to the first PFD which outputs an error signal, and PN measurement circuitry including a replica CP coupled to an output of a second PFD or the first PFD. The error signal is received at the replica CP or the divided and reference frequency signal are received at the second PFD, wherein the replica CP outputs a scaled phase error current which is current-to-voltage converted and amplified to provide an amplified phase error voltage, and digitized to provide a digital phase error signal. The digital phase error signal is frequency analyzed to generate a PN measurement.Type: GrantFiled: December 31, 2014Date of Patent: July 4, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Patent number: RE48613Abstract: A method of measuring phase noise (PN). A PLL frequency synthesizer is provided including a first phase frequency detector (PFD) receiving a reference frequency signal coupled to a first charge pump (CP) coupled to a VCO having an output fedback to the first PFD through a feedback divider that provides a divided frequency signal to the first PFD which outputs an error signal, and PN measurement circuitry including a replica CP coupled to an output of a second PFD or the first PFD. The error signal is received at the replica CP or the divided and reference frequency signal are received at the second PFD, wherein the replica CP outputs a scaled phase error current which is current-to-voltage converted and amplified to provide an amplified phase error voltage, and digitized to provide a digital phase error signal. The digital phase error signal is frequency analyzed to generate a PN measurement.Type: GrantFiled: July 3, 2019Date of Patent: June 29, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Sreekiran Samala, Raghu Ganesan
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Patent number: RE49571Abstract: A method of measuring phase noise (PN). A PLL frequency synthesizer is provided including a first phase frequency detector (PFD) receiving a reference frequency signal coupled to a first charge pump (CP) coupled to a VCO having an output fedback to the first PFD through a feedback divider that provides a divided frequency signal to the first PFD which outputs an error signal, and PN measurement circuitry including a replica CP coupled to an output of a second PFD or the first PFD. The error signal is received at the replica CP or the divided and reference frequency signal are received at the second PFD, wherein the replica CP outputs a scaled phase error current which is current-to-voltage converted and amplified to provide an amplified phase error voltage, and digitized to provide a digital phase error signal. The digital phase error signal is frequency analyzed to generate a PN measurement.Type: GrantFiled: January 21, 2021Date of Patent: July 4, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Sreekiran Samala, Raghu Ganesan