Patents by Inventor Srinath B. Pai

Srinath B. Pai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11619960
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Publication number: 20210318704
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 14, 2021
    Applicant: Intel Corporation
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Patent number: 11048283
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: June 29, 2021
    Assignee: Intel Corporation
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Publication number: 20200264645
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 20, 2020
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Patent number: 10635124
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: April 28, 2020
    Assignee: Intel Corporation
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Publication number: 20180292851
    Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.
    Type: Application
    Filed: April 11, 2017
    Publication date: October 11, 2018
    Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
  • Patent number: 9041513
    Abstract: A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to communicate with a data logger in an RFID tag. The RFID reader performs data access processes using an Index Register and a Data Register of the RFID tag. The RFID reader selects one of (1) Index Read access (2) Index Write access (3) Data Write access (4) Data Read access with parity and (5) Data Read access with cyclic redundancy check (CRC). The RFID tag performs the requested data access and then performs an error detection process.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: May 26, 2015
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Srinath B. Pai, K. Krishna Moorthy
  • Patent number: 8477015
    Abstract: A system and method is disclosed for using an input data signal as a clock signal in a state machine of a radio frequency identification (RFID) tag. An output of a demodulator in the RFID tag is directly coupled to a clock input of the command state machine in the RFID state machine. The command state machine receives an edge detect signal directly from the input data signal and then immediately generates backscatter signals to begin a backscatter process. The edge detect signal may comprise a rising edge of a data symbol of the RFID protocol. The immediate initiation of the backscatter process reduces latency of the backscatter process in the RFID state machine.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: July 2, 2013
    Assignee: National Semiconductor Corporation
    Inventor: Srinath B. Pai
  • Patent number: 8330631
    Abstract: A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: December 11, 2012
    Assignee: National Semiconductor Corporation
    Inventors: DVJ Ravi Kumar, Priyanka Khasnis, Gururaj Ghorpade, Theertham Srinivas, Srinath B. Pai, Vallamkonda Madhuri
  • Publication number: 20120119930
    Abstract: A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.
    Type: Application
    Filed: October 19, 2010
    Publication date: May 17, 2012
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: DVJ Ravi Kumar, Priyanka Khasnis, Gururaj Ghorpade, Theertham Srinivas, Srinath B. Pai, Vallamkonda Madhuri