Patents by Inventor Srinivas Nimmagadda

Srinivas Nimmagadda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170063782
    Abstract: Some embodiments provide novel methods for processing remote-device data messages in a network based on data-message attributes from a remote device management (RDM) system. For instance, the method of some embodiments identifies a set of RDM attributes associated with a data message, and then performs one or more service operations based on identified RDM attribute set.
    Type: Application
    Filed: November 1, 2015
    Publication date: March 2, 2017
    Inventors: Jayant Jain, Anirban Sengupta, Srinivas Nimmagadda, Alok S. Tiagi, Kausum Kumar
  • Publication number: 20170063787
    Abstract: Some embodiments provide novel methods for processing remote-device data messages in a network based on data-message attributes from a remote device management (RDM) system. For instance, the method of some embodiments identifies a set of RDM attributes associated with a data message, and then performs one or more service operations based on identified RDM attribute set.
    Type: Application
    Filed: November 1, 2015
    Publication date: March 2, 2017
    Inventors: Leung Tao Kwok, Sulay Shah, Craig Newell, Adam Rykowski, Sridhar Kommireddy, Utkarsh Singh, Sagar Date, Kausum Kumar, Anirban Sengupta, Srinivas Nimmagadda, Jayant Jain, Uday Masurekar, Ravishankar Chamarajnagar
  • Patent number: 9483258
    Abstract: The disclosed embodiments provide a system that facilitates the deployment and execution of a software offering. During operation, the system obtains a set of requirements associated with a service definition of the software offering. Next, the system uses the requirements to automatically provision a set of infrastructure slices for use by the software offering without requiring manual configuration of the resources by a user, wherein each of the infrastructure slices includes a set of resources configured to support a workload associated with the software offering.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: November 1, 2016
    Assignee: INTUIT INC
    Inventors: Jerome Labat, Ramachandran Varadharajan, Joseph W. Armstrong, Srinivas Nimmagadda
  • Publication number: 20120222037
    Abstract: The disclosed embodiments provide a system that facilitates the maintenance and execution of a software offering. During operation, the system obtains a policy change associated with a service definition of the software offering. Next, the system updates one or more requirements associated with the software offering based on the policy change. Finally, the system uses the updated requirements to dynamically reprovision one or more resources for use by the software offering during execution of the software offering.
    Type: Application
    Filed: February 24, 2011
    Publication date: August 30, 2012
    Applicant: INTUIT INC.
    Inventors: Jerome Labat, Ramachandran Varadharajan, Sivakumar Prakash Thivakaram, Srinivas Nimmagadda
  • Publication number: 20090222280
    Abstract: A system and method are disclosed that provide for processing certification data. The system and method include determining a rating definition associated with an engine configuration, and associating an arrangement number with the rating definition. In addition, the system and method include associating a certification type with the arrangement number, and associating a certification dataset, created by recording emissions test results of one or more emissions data parameters, with the rating definition to generate a certification family. The one or more emissions data parameters are included in at least one of an emissions law or an emissions regulation.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Inventors: Shiva Mittal, Srinivas Nimmagadda, Keith Robert Glascock, Shelly Renee Frazier, Bradley Todd Ford
  • Patent number: 7263149
    Abstract: The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: August 28, 2007
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Kevin S. Donnelly, Ely K. Tsern, Srinivas Nimmagadda
  • Publication number: 20050063502
    Abstract: The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
    Type: Application
    Filed: November 10, 2004
    Publication date: March 24, 2005
    Inventors: Frederick Ware, Kevin Donnelly, Ely Tsern, Srinivas Nimmagadda
  • Patent number: 6836521
    Abstract: The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: December 28, 2004
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Kevin S. Donnelly, Ely K. Tsern, Srinivas Nimmagadda
  • Publication number: 20020150189
    Abstract: The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
    Type: Application
    Filed: March 4, 2002
    Publication date: October 17, 2002
    Applicant: Rambus Incorporated
    Inventors: Frederick A. Ware, Kevin S. Donnelly, Ely K. Tsern, Srinivas Nimmagadda
  • Patent number: 6396887
    Abstract: The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: May 28, 2002
    Assignee: Rambus Incorporated
    Inventors: Frederick A. Ware, Kevin S. Donnelly, Ely K. Tsern, Srinivas Nimmagadda
  • Patent number: 6266730
    Abstract: A high frequency bus system which insures uniform arrival times of high-fidelity signals to the devices on the high frequency bus, despite the use of the bus on modules and connectors. A high frequency bus system includes a first bus segment having one or more devices connected between a first and a second end. The first bus segment has at least a pair of transmission lines for propagating high frequency signals and the devices are coupled to the pair of transmission lines. The high frequency bus system also includes a second bus segment which has no devices connected to it. The second bus segment also has at least a pair of transmission lines for propagating high frequency signals. The first end of the first segment and second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at the substantially the same time, they arrive at each device connected to the first bus segment at substantially the same time.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: July 24, 2001
    Assignee: Rambus Inc.
    Inventors: Donald V. Perino, Billy Wayne Garrett, Jr., Haw-Jyh Liaw, David Nguyen, Srinivas Nimmagadda, James A. Gasbarro, Richard DeWitt Crisp
  • Patent number: 6067594
    Abstract: A high frequency bus system which insures uniform arrival times of high-fidelity signals to the devices on the high frequency bus, despite the use of the bus on modules and connectors. A high frequency bus system includes a first bus segment having one or more devices connected between a first and a second end. The first bus segment has at least a pair of transmission lines for propagating high frequency signals and the devices are coupled to the pair of transmission lines. The high frequency bus system also includes a second bus segment which has no devices connected to it. The second bus segment also has at least a pair of transmission lines for propagating high frequency signals. The first end of the first segment and second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at the substantially the same time, they arrive at each device connected to the first bus segment at substantially the same time.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: May 23, 2000
    Assignee: Rambus, Inc.
    Inventors: Donald V. Perino, Billy Wayne Garrett, Jr., Haw-Jyh Liaw, David Nguyen, Srinivas Nimmagadda, James A. Gasbarro, Richard DeWitt Crisp
  • Patent number: 5663661
    Abstract: A modular bus permitting single or double termination is described. The bus includes a terminated motherboard data net for communicating data signals between a master and one or more motherboard devices. A socket is used for coupling the data signals between the motherboard data net and a terminated module data net of a removable module. The module data net communicates the data signals between the master and one or more module devices. The data signal swing and level of reflection of the data signals are substantially independent of the presence of the module.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: September 2, 1997
    Assignee: Rambus, Inc.
    Inventors: John B. Dillon, Srinivas Nimmagadda, Alfredo Moncayo
  • Patent number: 5578940
    Abstract: A modular bus permitting single or double termination is described. The bus includes a terminated motherboard data net for communicating data signals between a master and one or more motherboard devices. A socket is used for coupling the data signals between the motherboard data net and a terminated module data net of a removable module. The module data net communicates the data signals between the master and one or more module devices. The data signal swing and level of reflection of the data signals are substantially independent of the presence of the module.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: November 26, 1996
    Assignee: Rambus, Inc.
    Inventors: John B. Dillon, Srinivas Nimmagadda, Alfredo Moncayo