Abstract: Techniques related to parallel partitioning and coding mode selection for improved video coding throughput are discussed. Such techniques include performing parallel partitioning and coding mode selection for a lower-right coding unit of a first largest coding unit and an upper-left coding unit of a second largest coding unit to the right of the first largest coding unit and, immediately subsequent thereto, performing parallel partitioning and coding mode selection for a lower-left coding unit and an upper-right coding unit of the second largest coding unit.

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine a residual error based on coding unit information, and determine a candidate coding unit and an associated rate distortion cost based on the residual error. An embodiment may additionally or alternatively include technology to partition a first coding unit into two or more smaller coding units based on a partition message, accelerate processing of at least one of the two or more smaller coding units, and estimate motion fora frame based at least partially on results of the accelerated processing. Other embodiments are disclosed and claimed.

Abstract: Example apparatus to encode video disclosed herein include an encoder to perform an intra search first stage based on source pixels of a source video frame to determine first intra candidates to predict a block of the source video frame. In disclosed examples, the encoder is also to perform an intra search second stage based on reconstructed pixels of neighboring blocks associated with the first intra candidates to determine a second intra candidate. In disclosed examples, the encoder is further to encode the block of the source video frame based on the second intra candidate.

Abstract: A system for video encoding is described herein. The system includes a processor to execute a multi-pass palette search and mapping on a video frame to generate palette candidates. The processor is to execute an intra block copy prediction on the video frame to generate intra-block-copy candidates. The processor is to also calculate a rate distortion optimization (RDO) cost for a set of generated residuals, the palette candidates, and the intra-block-copy candidates. The processor is to further also execute a final mode decision based on a comparison of the rate distortion optimization (RDO) costs.

Abstract: Example apparatus to encode video disclosed herein include an encoder to perform an intra search first stage based on source pixels of a source video frame to determine first intra candidates to predict a block of the source video frame. In disclosed examples, the encoder is also to perform an intra search second stage based on reconstructed pixels of neighboring blocks associated with the first intra candidates to determine a second intra candidate. In disclosed examples, the encoder is further to encode the block of the source video frame based on the second intra candidate.

Abstract: An embodiment of a motion estimator apparatus may include technology to receive a compound message, and perform rate distortion estimation and check refinement for two or more coding unit descriptions for a source block based on the received compound message. Other embodiments are disclosed and claimed.

Abstract: An apparatus may include a memory to receive an image frame to encode; and a modular motion estimation engine to process the image frame. The modular motion estimation engine includes modular motion estimation circuitry comprising a multiplicity of motion estimation circuits, and a motion estimation kernel for execution on the modular motion estimation circuitry to send the image frame through one or more configurable execution pipelines that each execute motion estimation over one or more of the motion estimation circuits.

Abstract: An example system includes a processor to execute an intra search first stage on a video frame to generate intra candidates. The processor is to execute an intra search second stage on the intra candidates to generate a final intra candidate and residuals. The processor is to also execute a final mode decision and generate reconstructed pixels based on the final intra candidate and the residuals.

Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.

Abstract: Embodiments described herein provide an apparatus comprising a processor to configure a plurality of contexts of a command engine to execute a graphics workload comprising a plurality of walkers, allocate, from a pool of execution units of a graphics processor, a subset of execution units to each walker in the plurality of walkers based at least in part on the predetermined number of walkers configured for the context, for each context in the plurality of contexts, dispatch one or more walkers of the plurality of walkers to the execution units, and upon dispatch of the one or more walkers of the plurality of walkers, write an opcode to a computer-readable memory indicating that the dispatch of the walker is complete, wherein the opcode comprises dependency data for the one or more walkers of the plurality of walkers. Other embodiments may be described and claimed.

Abstract: Embodiments described herein provide an apparatus comprising a processor to configure a plurality of contexts of a command engine to execute a graphics workload comprising a plurality of walkers, allocate, from a pool of execution units of a graphics processor, a subset of execution units to each walker in the plurality of walkers based at least in part on the predetermined number of walkers configured for the context, for each context in the plurality of contexts, dispatch one or more walkers of the plurality of walkers to the execution units, and upon dispatch of the one or more walkers of the plurality of walkers, write an opcode to a computer-readable memory indicating that the dispatch of the walker is complete, wherein the opcode comprises dependency data for the one or more walkers of the plurality of walkers. Other embodiments may be described and claimed.

Abstract: Techniques related to parallel partitioning and coding mode selection for improved video coding throughput are discussed. Such techniques include performing parallel partitioning and coding mode selection for a lower-right coding unit of a first largest coding unit and an upper-left coding unit of a second largest coding unit to the right of the first largest coding unit and, immediately subsequent thereto, performing parallel partitioning and coding mode selection for a lower-left coding unit and an upper-right coding unit of the second largest coding unit.

Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.

Abstract: Systems, apparatus and methods are described including operations for video coding rate control including Rate Distortion Optimized Quantization on a block-by-block basis.

Abstract: An example system includes a processor to execute an intra search first stage on a video frame to generate intra candidates. The processor is to execute an intra search second stage on the intra candidates to generate a final intra candidate and residuals. The processor is to also execute a final mode decision and generate reconstructed pixels based on the final intra candidate and the residuals.

Abstract: A system for video encoding is described herein. The system includes a processor to execute a multi-pass palette search and mapping on a video frame to generate palette candidates. The processor is to execute an intra block copy prediction on the video frame to generate intra-block-copy candidates. The processor is to also calculate a rate distortion optimization (RDO) cost for a set of generated residuals, the palette candidates, and the intra-block-copy candidates. The processor is to further also execute a final mode decision based on a comparison of the rate distortion optimization (RDO) costs.

Abstract: Techniques related to coding video using out of loop inter motion estimation are discussed. Such techniques include performing simultaneous motion estimation for multiple blocks using merge candidates such that at least one of the blocks has non-final merge candidates, finalizing the merge candidates for the at least one block, and resolving reference to any non-final merge candidates that became invalid in the finalized merge candidates for final motion estimation.

Abstract: An embodiment of a motion estimator apparatus may include technology to receive a compound message, and perform rate distortion estimation and check refinement for two or more coding unit descriptions for a source block based on the received compound message. Other embodiments are disclosed and claimed.

Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.

Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.