Patents by Inventor Srinivasan Sivaram
Srinivasan Sivaram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096850Abstract: An integrated controller, logic circuit and memory array (“CLM”) semiconductor device includes stacked controller, memory array logic circuit and memory array wafers, or individual dies diced therefrom, which together operate as a single, integrated semiconductor flash memory device. The memory array logic circuit dies and/or the memory array dies may be formed with full-thickness plated or filled vias connecting to bond pads on opposed surfaces of the dies. The bond pads of the respective stacked semiconductor dies may be aligned and affixed to each other to electrically and mechanically couple each of the semiconductor dies in the respective wafers together.Type: ApplicationFiled: September 20, 2022Publication date: March 21, 2024Applicant: SanDisk Technologies LLCInventors: Jayavel Pachamuthu, Srinivasan Sivaram, Masaaki Higashitani
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Patent number: 11011500Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.Type: GrantFiled: March 12, 2020Date of Patent: May 18, 2021Assignee: SanDisk Technologies LLCInventors: Nagesh Vodrahalli, Shrikar Bhagath, Chih Yang Li, Srinivasan Sivaram, Rama Shukla
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Publication number: 20210104495Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.Type: ApplicationFiled: March 12, 2020Publication date: April 8, 2021Applicant: SANDISK TECHNOLOGIES LLCInventors: Nagesh Vodrahalli, Shrikar Bhagath, Chih Yang Li, Srinivasan Sivaram, Rama Shukla
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Patent number: 9819219Abstract: The various embodiments herein provide an energy efficient DC off-grid home system and a method for operating the same. The system generates, stores and delivers the solar energy to the connected equipments in a controlled and efficient manner. The system has several solar panels, a battery bank, a home control unit, several appliances and equipments which run on electric power and a remote terminal unit. The solar panels are used to capture maximum solar energy from the sun. The battery bank has several batteries arranged in series and parallel combinations to store maximum electrical energy. The home control unit is a central control station which assists in storing energy in the battery bank, delivering optimum energy to the electrical appliances and monitoring the healthy operating status of the entire system.Type: GrantFiled: October 19, 2014Date of Patent: November 14, 2017Inventors: Ravi Annavajjhala, Srinivasan Sivaram
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Publication number: 20150108839Abstract: The various embodiments herein provide an energy efficient DC off-grid home system and a method for operating the same. The system generates, stores and delivers the solar energy to the connected equipments in a controlled and efficient manner. The system has several solar panels, a battery bank, a home control unit, several appliances and equipments which run on electric power and a remote terminal unit. The solar panels are used to capture maximum solar energy from the sun. The battery bank has several batteries arranged in series and parallel combinations to store maximum electrical energy. The home control unit is a central control station which assists in storing energy in the battery bank, delivering optimum energy to the electrical appliances and monitoring the healthy operating status of the entire system.Type: ApplicationFiled: October 19, 2014Publication date: April 23, 2015Inventors: SRINIVASAN SIVARAM, RAVI ANNAVAJJHALA
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Patent number: 8481845Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: GrantFiled: February 5, 2008Date of Patent: July 9, 2013Assignee: GTAT CorporationInventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Patent number: 8247260Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: GrantFiled: July 8, 2009Date of Patent: August 21, 2012Assignee: Twin Creeks Technologies, Inc.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Patent number: 7967936Abstract: Methods for bonding a donor wafer to a receiver element and transferring a lamina from the donor wafer to the receiver element are disclosed herein. The donor wafer may be, for example, a monocrystalline silicon wafer with a thickness of from about 300 microns to about 1000 microns, and the lamina may be may be less than 100 microns thick. The receiver element may be composed of, for example, metal or glass, and the receiver element may have dissimilar thermal expansion properties from the lamina. Although the lamina and the receiver element may have dissimilar thermal expansion properties, the methods disclosed herein maintain the integrity of the bond between the lamina and the receiver element.Type: GrantFiled: December 15, 2008Date of Patent: June 28, 2011Assignee: Twin Creeks Technologies, Inc.Inventors: Aditya Agarwal, Srinivasan Sivaram, Michael Vyvoda
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Patent number: 7842585Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: GrantFiled: September 11, 2008Date of Patent: November 30, 2010Assignee: Twin Creeks Technologies, Inc.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20100147448Abstract: Methods for bonding a donor wafer to a receiver element and transferring a lamina from the donor wafer to the receiver element are disclosed herein. The donor wafer may be, for example, a monocrystalline silicon wafer with a thickness of from about 300 microns to about 1000 microns, and the lamina may be may be less than 100 microns thick. The receiver element may be composed of, for example, metal or glass, and the receiver element may have dissimilar thermal expansion properties from the lamina. Although the lamina and the receiver element may have dissimilar thermal expansion properties, the methods disclosed herein maintain the integrity of the bond between the lamina and the receiver element.Type: ApplicationFiled: December 15, 2008Publication date: June 17, 2010Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Aditya Agarwal, Srinivasan Sivaram, Michael Vyvoda
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Publication number: 20100009488Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: July 8, 2009Publication date: January 14, 2010Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20090194162Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: February 5, 2008Publication date: August 6, 2009Applicant: Twin Creeks Technologies, Inc.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20090194163Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: September 10, 2008Publication date: August 6, 2009Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20090194164Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: September 11, 2008Publication date: August 6, 2009Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20090197367Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: September 12, 2008Publication date: August 6, 2009Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Publication number: 20090197368Abstract: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.Type: ApplicationFiled: September 11, 2008Publication date: August 6, 2009Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Srinivasan Sivaram, Aditya Agarwal, S. Brad Herner, Christopher J. Petti
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Patent number: 5612254Abstract: A device and methods of forming an interconnection within a prepatterned channel in a semiconductor device are described. The present invention includes a method of forming an interconnect channel within a semiconductor device. A first dielectric layer is deposited over a substrate and patterned to form a contact opening that is subsequently filled with a contact plug. A second dielectric layer is deposited over the patterned first dielectric layer and the contact plug. The second dielectric layer is patterned to form the interconnect channel, wherein the first dielectric layer acts as an etch stop to prevent etching of the substrate. The present invention also includes a method of forming an interconnect. A dielectric layer is deposited over a substrate and patterned to form an interconnect chapel. A metal layer is deposited over the patterned dielectric layer and within the interconnect channel.Type: GrantFiled: June 29, 1992Date of Patent: March 18, 1997Assignee: Intel CorporationInventors: Xiao-Chun Mu, Srinivasan Sivaram, Donald S. Gardner, David B. Fraser