Abstract: Provided are compositions, systems, and methods of using a synthetic latex composition for treating a subterranean formation. An example method comprises providing a synthetic latex composition comprising: a synthetic latex and a latex stabilizer; and exposing the synthetic latex composition to air for an exposure period of at least one day; wherein the synthetic latex composition loses less than 5% of its initial water concentration at the end of a one-day exposure period. The synthetic latex composition may be further included in a treatment fluid. The treatment fluid may be introduced into a wellbore penetrating a subterranean formation.

Abstract: Systems and methods for localization and mapping an environment using a measurement device are provided. One system includes a vehicle, first and second measurement devices configured to generate range/azimuth data for reference landmarks in the environment, a processor, and memory. The memory includes a map module storing data representing a map of the environment including known coordinates for the plurality of reference landmarks. One method includes generating a map of the environment based on known coordinates for each of the plurality of reference landmarks, receiving range and azimuth data for each of a plurality of candidate reference landmarks from a measurement device, and identifying each of the plurality of reference landmarks in the plurality of candidate reference landmark. The method further includes associating the plurality of candidate reference landmarks with the plurality of reference landmarks in the map and localizing a mobile platform based on the associating step.

Abstract: Embodiments of the present invention relate to a system and method for comparatively increasing processor throughput and relieving pressure on the processor's scheduler and register file by diverting instructions dependent on long-latency operations from a flow of the processor pipeline and re-introducing the instructions into the flow when the long-latency operations are completed. In this way, the instructions do not tie up resources and overall instruction throughput in the pipeline is comparatively increased. Before the instructions are diverted from the pipeline, they may undergo a conventional process to map logical registers of the instructions to physical registers. Before the instructions are re-introduced into the pipeline, the physical registers mapped according to the conventional process may be re-mapped to other physical registers, thereby efficiently preserving correct program sequence information.

Abstract: Embodiments of the present invention relate to a system and method for comparatively increasing processor throughput and relieving pressure on the processor's scheduler and register file by diverting instructions dependent on long-latency operations from a flow of the processor pipeline and re-introducing them into the flow when the long-latency operations are completed. In this way, the instructions do not tie up resources and overall instruction throughput in the pipeline is comparatively increased.