Patents by Inventor Srinivasan Surendran

Srinivasan Surendran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6046691
    Abstract: A system and method employing a rate 16/17 (0,5) code constructed in accordance with a set of pivot bits and a set of corrections for predefined code violations limits the number of consecutive zeros seen by a channel to five. The rate 16/17 (0,5) code is suitable for magnetic or similar recording media and may be employed in partial response maximum likelihood read channels. A feature of the constructed code is a high transition density which allows for more frequent timing and gain control updates, which results in lower required channel input signal to noise ratio for a given channel performance. Each constructed codeword is block encodable and block decodable, and the code construction allows for efficient circuit implementation in both an encoder and a decoder.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: April 4, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Pervez M. Aziz, Patrick W. Kempsey, Srinivasan Surendran
  • Patent number: 5682125
    Abstract: An analog, adaptive generalized transversal equalizer for use in the filtering system of a disc drive PRML read channel, the transversal equalizer employing the use of non-ideal delay elements. The filtering system comprises the equalizer connected in series with an adaptive, analog prefilter. The prefilter is comprised of a plurality of serially connected, adaptive, analog filter stages having variable transfer functions determined by adaptive parameter signals received by the filter stages. The generalized transversal equalizer comprises a plurality of serially connected, adaptive, analog low pass filters, having taps on either side of each low pass filter, a plurality of multipliers that receive signals at the tap locations of the delay circuit, and a summing circuit that receives the outputs of the multipliers.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: October 28, 1997
    Assignee: Seagate Technology, Inc.
    Inventors: Vadim B. Minuhin, Vladimir Kovner, Srinivasan Surendran
  • Patent number: 5596459
    Abstract: A disc drive system includes a plurality of subsystems. At least one of the subsystems includes a filter which is completely integrated using a synthetic integrated circuit element.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: January 21, 1997
    Assignee: Seagate Technology, Inc.
    Inventors: Vladimir Kovner, Vadim B. Minuhin, Srinivasan Surendran
  • Patent number: 5592340
    Abstract: An adaptive, analog filter system of a PRML [PARTIAL RESPONSE MAXIMUM LIKELIHOOD ] read channel of a disc drive comprising an adaptive, analog transversal equator connected in series with an adaptive, analog prefilter. The prefilter is comprised of a plurality of serially connected, adaptive, analog filter stages having variable transfer functions determined by adaptive parameter signals received by the filter stages. The transversal equalizer is comprised of a delay circuit, comprised of a plurality of serially connected, adaptive, analog sixth order low pass filters, that is tapped to either side of each low pass filter, a plurality of analog multipliers that receive signals at the tap locations of the delay circuit, and a summing circuit that receives the outputs of the multipliers.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: January 7, 1997
    Assignee: Seagate Technology, Inc.
    Inventors: Vadim B. Minuhin, Vladimir Kovner, Srinivasan Surendran
  • Patent number: 5459757
    Abstract: Method and apparatus for controlling the timing of the sampling of signals and signal amplitude in a PRML read channel. A VCO generates a read clock and a clock generator connected to the VCO generates even and odd clock signals corresponding to even and odd cycles of operation of the VCO. Serially connected even sample and hold circuits respond to clock signals to store samples of the read channel signal taken during successive odd cycles and serially connected odd sample and hold circuits store samples taken during successive even cycles. Comparator circuits compare the samples taken in each cycle to reference signals and the comparisons are clocked through two stage, even and odd shift registers to provide estimates of the presence or absence of nonzero samples for each even and odd cycle.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: October 17, 1995
    Assignee: Seagate Technology, Inc.
    Inventors: Vadim B. Minuhin, Vladimir Kovner, Steven V. Holsinger, Srinivasan Surendran
  • Patent number: 5392171
    Abstract: A disc drive system includes a plurality of subsystems. At least one of the subsystems includes a filter which is completely integrated using a synthetic integrated circuit element.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: February 21, 1995
    Assignee: Seagate Technology, Inc.
    Inventors: Vladimir Kovner, Vadim B. Minuhin, Srinivasan Surendran