Abstract: A pixel structure includes a drain extension portion disposed on an islanding semiconductor layer, wherein the islanding semiconductor layer is formed together with a thin-film transistor channel layer. Therefore, the total thickness of the islanding semiconductor layer and the drain extension portion is increased, such that the distance between the gate line and the drain extension portion is enlarged, and the coupling capacitance between the gate line and the drain extension portion can be lowered. Therefore, the display panel with the pixel structure of the present invention can have low coupling capacitance so as to improve the flicker phenomena obviously.

Abstract: A pixel structure adapts for compensating variation of gate-drain parasitic capacitance caused by misalignment in manufacturing process by forming a transverse compensation capacitance between a capacitance compensation portion and a scan line in an in-plane direction, and therefore the flicker in displaying of a display panel can be alleviated. In addition, being applied into a concept of “data lines reducing”, the pixel structure is capable of reducing difference of capacitance between two adjacent pixel structures due to misalignment in manufacturing process and improving display uniformity. Furthermore, a thin film transistor array substrate, a display panel, and a display apparatus applying the pixel structure are also provided.

Abstract: A pixel structure includes a drain shielding extension portion disposed on a floating semiconductor layer, wherein the floating semiconductor layer is formed together with a thin-film transistor channel layer. Therefore, the total thickness of the floating semiconductor layer and the drain shielding extension portion is increased, such that the distance between the gate line and the drain shielding extension portion is enlarged, and the coupling capacitance between the gate line and the drain shielding extension portion can be lowered. Therefore, the display panel with the pixel structure of the present invention can have low coupling capacitance so as to improve the flicker phenomena obviously.

Abstract: A pixel structure adapts for compensating variation of gate-drain parasitic capacitance caused by misalignment in manufacturing process by forming a transverse compensation capacitance between a capacitance compensation portion and a scan line in an in-plane direction, and therefore the flicker in displaying of a display panel can be alleviated. In addition, being applied into a concept of “data lines reducing”, the pixel structure is capable of reducing difference of capacitance between two adjacent pixel structures due to misalignment in manufacturing process and improving display uniformity. Furthermore, a thin film transistor array substrate, a display panel, and a display apparatus applying the pixel structure are also provided.