Patents by Inventor Ssu-Pin Ma
Ssu-Pin Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11503563Abstract: A first signal generated from a signal generator may be synchronized with a local clock of a first device at a first time, and sent to a second device, the first signal having a first frequency. A second signal generated from the signal generator may be further synchronized with the local clock of the first device at a second time, the second signal having a second frequency different from the first frequency, and a difference between the second time and the first time being within a predetermined range of a predetermined time difference. The second signal may then be sent to the second device to enable the second device to determine a distance between the first device and the second device based at least in part on a phase difference between the first signal and the second signal.Type: GrantFiled: February 4, 2020Date of Patent: November 15, 2022Assignee: Alibaba Group Holding LimitedInventors: Ssu-Pin Ma, Hueiming Steve Yang
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Publication number: 20210243716Abstract: A first signal generated from a signal generator may be synchronized with a local clock of a first device at a first time, and sent to a second device, the first signal having a first frequency. A second signal generated from the signal generator may be further synchronized with the local clock of the first device at a second time, the second signal having a second frequency different from the first frequency, and a difference between the second time and the first time being within a predetermined range of a predetermined time difference. The second signal may then be sent to the second device to enable the second device to determine a distance between the first device and the second device based at least in part on a phase difference between the first signal and the second signal.Type: ApplicationFiled: February 4, 2020Publication date: August 5, 2021Inventors: SSU-PIN MA, Hueiming Steve Yang
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Patent number: 9003254Abstract: A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion under test, a comparator and a comparison result recorder. The circuit portion under test receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. The comparator outputs comparison results according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The system receives at least a portion of test signals and at least a portion of ideal response signals in a dynamically configurable time-interleaved manner via one or more physical channels from a test equipment.Type: GrantFiled: February 16, 2014Date of Patent: April 7, 2015Inventor: Ssu-Pin Ma
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Publication number: 20140195870Abstract: A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion under test, a comparator and a comparison result recorder. The circuit portion under test receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. The comparator outputs comparison results according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The system receives at least a portion of test signals and at least a portion of ideal response signals in a dynamically configurable time-interleaved manner via one or more physical channels from a test equipment.Type: ApplicationFiled: February 16, 2014Publication date: July 10, 2014Inventor: SSU-PIN MA
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Patent number: 8737545Abstract: Apparatuses, methods and systems of selecting a gain setting of a receiver chain are disclosed. One method includes bypassing a filter portion of the receiver chain and sampling a bypass receive signal while the filter portion of the receiver chain is bypassed. If the sampled bypass receive signal is determined to be saturated greater than a threshold, then selecting a gain setting of the receive chain as a function of the saturation. Further, the filter portion of the receive chain is included while sampling a receive signal with the selected gain setting.Type: GrantFiled: December 14, 2011Date of Patent: May 27, 2014Assignee: Posedge Inc.Inventors: Sujai Chari, Ssu-Pin Ma
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Patent number: 8694845Abstract: A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion to be tested, a comparator and a comparison result recorder. The circuit portion to be tested receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. Then, the comparator outputs a comparison result according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The comparison result recorder may record comparison results within a period of test time. The test instrument can obtain a record of the comparison results from the comparison result recorder.Type: GrantFiled: April 25, 2010Date of Patent: April 8, 2014Inventor: Ssu-Pin Ma
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Publication number: 20130156140Abstract: Apparatuses, methods and systems of selecting a gain setting of a receiver chain are disclosed. One method includes bypassing a filter portion of the receiver chain and sampling a bypass receive signal while the filter portion of the receiver chain is bypassed. If the sampled bypass receive signal is determined to be saturated greater than a threshold, then selecting a gain setting of the receive chain as a function of the saturation. Further, the filter portion of the receive chain is included while sampling a receive signal with the selected gain setting.Type: ApplicationFiled: December 14, 2011Publication date: June 20, 2013Applicant: Posedge Inc.Inventors: Sujai Chari, Ssu-Pin Ma
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Patent number: 8413453Abstract: An auxiliary control device is adapted to an air conditioning system. The air conditioning system includes a main machine and several vents. The auxiliary control device includes a vent unit and a sub-control unit. The vent unit has valves corresponding disposed on the vents, and a driver for actuating the valve to adjust an opening size of the vent through the valve. The sub-control unit includes a sub-memory for storing a control time table, a sub-timer for generating the time information, and a sub-controller for controlling the driver to adjust the opening size according to the control time table and the time information. Accordingly, the auxiliary control device is easily adapted to an air conditioning system existing in a user place and controls opening size of the vents in accordance with the control time table previously set by the user.Type: GrantFiled: November 9, 2009Date of Patent: April 9, 2013Inventors: Ssu-Pin Ma, Ravi Aripirala
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Patent number: 8180304Abstract: A technique for efficient power amplification includes providing multiple baseband signals to an amplifier. The signals may be converted to RF and combined through one or more impedance inverters.Type: GrantFiled: April 2, 2008Date of Patent: May 15, 2012Assignee: Quantenna Communications, Inc.Inventors: Ssu-Pin Ma, Thai Nguyen, Feipeng Wang
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Publication number: 20110264973Abstract: A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion to be tested, a comparator and a comparison result recorder. The circuit portion to be tested receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. Then, the comparator outputs a comparison result according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The comparison result recorder may record comparison results within a period of test time. The test instrument can obtain a record of the comparison results from the comparison result recorder.Type: ApplicationFiled: April 25, 2010Publication date: October 27, 2011Inventor: SSU-PIN MA
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Publication number: 20110112695Abstract: An auxiliary control device is adapted to an air conditioning system. The air conditioning system includes a main machine and several vents. The auxiliary control device includes a vent unit and a sub-control unit. The vent unit has valves corresponding disposed on the vents, and a driver for actuating the valve to adjust an opening size of the vent through the valve. The sub-control unit includes a sub-memory for storing a control time table, a sub-timer for generating the time information, and a sub-controller for controlling the driver to adjust the opening size according to the control time table and the time information. Accordingly, the auxiliary control device is easily adapted to an air conditioning system existing in a user place and controls opening size of the vents in accordance with the control time table previously set by the user.Type: ApplicationFiled: November 9, 2009Publication date: May 12, 2011Inventors: Ssu-Pin Ma, Aripirala Ravi
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Publication number: 20110078649Abstract: A wafer layout assisting method is used to assist a circuit designer to estimate the layout related parameter during a circuit designing process. The wafer layout assisting method includes the following steps. A circuit information file is read. A graphic user interface (GUI) is generated according to the circuit information file. A coarse layout arrangement input by a user is received. It is determined whether the coarse layout arrangement is finished or not. A layout related parameter is generated according to device types, device parameters, and the coarse layout arrangement, if the coarse layout arrangement is finished. The circuit designer may increase an accuracy of a circuit simulation result by appropriately utilizing the layout related parameters. Through the wafer layout assisting method, the layout related parameter after the layout is performed may be pre-estimated, thus reducing a difference between the circuit simulation results before and after the layout is performed.Type: ApplicationFiled: September 30, 2009Publication date: March 31, 2011Inventor: Ssu-Pin Ma
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Publication number: 20110050273Abstract: A fast testable wafer includes a die group, testing points located on dies, a scribe line located between the dies, and a plurality of testing pads disposed in the scribe line area. The testing points comprise bonding pads or electrodes of internal circuits within the dies. The testing pads and bonding pads may be electrically connected and arranged suitably such that testing probes may be electrically connected to the testing pads and bonding pads easily so as to test the plurality of dies at about the same time. Through suitable circuits on the wafer, different circuit routes may be selected to connect the testing pads and different testing points on the dies so as to test a plurality of dies without moving the testing probes and thereby accelerating the test.Type: ApplicationFiled: August 25, 2009Publication date: March 3, 2011Inventor: Ssu Pin Ma
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Patent number: 7623886Abstract: A method and apparatus of calibrating a transmitter are disclosed. The method includes attenuating transmitter output signals as controlled by an output control signal, ensuring that an average power of the transmitter output signals is below a threshold level, and performing calibration of the transmitter at periods of time in which the output control signal is attenuating the transmitter output signals a lesser amount. The lesser amount can be less than an average of a minimum amount of attenuation and a maximum amount of attenuation. The apparatus includes a transmitter that includes a frequency up-converting LO mixer for frequency up-converting base band signals, generating transmitter output signals, a transmitter antenna for transmitting the transmitter output signals, and control circuitry for controlling attenuating the transmitter output signals during a calibration of the transmitter.Type: GrantFiled: December 14, 2005Date of Patent: November 24, 2009Assignee: NDSSI Holdings, LLCInventors: Ssu-Pin Ma, Isaac Sever
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Publication number: 20090253389Abstract: A technique for efficient power amplification includes providing multiple baseband signals to an amplifier. The signals may be converted to RF and combined through one or more impedance inverters.Type: ApplicationFiled: April 2, 2008Publication date: October 8, 2009Inventors: Ssu-Pin Ma, Thai Nguyen, Feipeng Wang
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Patent number: 7437139Abstract: A method and apparatus of calibrating filtering of receive and transmit signals is disclosed. The method of calibrating filtering of a received signal includes injecting an LO signal. The injected LO signal is filtered by a tunable filter. The filtered signal is frequency down-converted with an equivalent LO signal. The frequency down-converted signal is sampled while tuning the filtering. A desired filter tuning is determined based upon the samples and a frequency of the LO signal. The method of calibrating filtering of a transmit signal includes injecting an LO signal to a transmitter. The LO signal is filtered by a tunable filter. The filtered signal is frequency down-converted with an equivalent LO signal. The frequency down-converted signal is sampled while tuning the filter. A desired filter tuning is determined based upon the samples and a frequency of the LO signal.Type: GrantFiled: October 26, 2005Date of Patent: October 14, 2008Assignee: Tzero Technologies, Inc.Inventors: Steve Lo, Isaac Sever, Thai Nguyen, Ssu-Pin Ma
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Publication number: 20070135058Abstract: A method and apparatus of calibrating a transmitter are disclosed. The method includes attenuating transmitter output signals as controlled by an output control signal, ensuring that an average power of the transmitter output signals is below a threshold level, and performing calibration of the transmitter at periods of time in which the output control signal is attenuating the transmitter output signals a lesser amount. The lesser amount can be less than an average of a minimum amount of attenuation and a maximum amount of attenuation. The apparatus includes a transmitter that includes a frequency up-converting LO mixer for frequency up-converting base band signals, generating transmitter output signals, a transmitter antenna for transmitting the transmitter output signals, and control circuitry for controlling attenuating the transmitter output signals during a calibration of the transmitter.Type: ApplicationFiled: December 14, 2005Publication date: June 14, 2007Inventors: Ssu-Pin Ma, Isaac Sever
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Publication number: 20070093224Abstract: A method and apparatus of calibrating filtering of receive and transmit signals is disclosed. The method of calibrating filtering of a received signal includes injecting an LO signal. The injected LO signal is filtered by a tunable filter. The filtered signal is frequency down-converted with an equivalent LO signal. The frequency down-converted signal is sampled while tuning the filtering. A desired filter tuning is determined based upon the samples and a frequency of the LO signal. The method of calibrating filtering of a transmit signal includes injecting an LO signal to a transmitter. The LO signal is filtered by a tunable filter. The filtered signal is frequency down-converted with an equivalent LO signal. The frequency down-converted signal is sampled while tuning the filter. A desired filter tuning is determined based upon the samples and a frequency of the LO signal.Type: ApplicationFiled: October 26, 2005Publication date: April 26, 2007Inventors: Steve Lo, Isaac Sever, Thai Nguyen, Ssu-Pin Ma
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Patent number: 7138880Abstract: A method for producing an oscillating signal comprises: generating an oscillating signal by discharging after charging to a high trigger level and charging after discharging to a low trigger level; and turbo-charging at the initial of a change-over from charging to discharging while resuming a normal charging/discharging thereafter, and vice versa. The present invention makes use of the turbo-charging/discharging for a linear compensation, such that the produced oscillating signal has the features of concurrently eliminating phase noises and jitters as well as maintaining the modulation linearity.Type: GrantFiled: April 29, 2005Date of Patent: November 21, 2006Assignee: RichWave Technology Corp.Inventors: Ssu-Pin Ma, Shao-Hua Chen
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Patent number: 7038294Abstract: Within a method for fabricating a microelectronic fabrication there is first provided a substrate. There is then formed over the substrate a spirally patterned conductor layer which terminates in a microelectronic structure within the center of the spirally patterned conductor layer. The spirally patterned conductor layer forms a planar spiral inductor, and the microelectronic structure formed within the center of the spirally patterned conductor layer further comprises a series of electrically interconnected sub-patterns. The method contemplates a microelectronic fabrication fabricated in accord with the method. The microelectronic fabrication is fabricated with optimal performance while occupying minimal microelectronic substrate area.Type: GrantFiled: March 29, 2001Date of Patent: May 2, 2006Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ssu-Pin Ma, Yen-Shih Ho