Patents by Inventor Stacy Ho
Stacy Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11728821Abstract: A digital to analog (DAC) circuit that performs least significant bit (LSB) dithering comprises: a first DAC; an auxiliary code generator configured to produce an auxiliary code; an auxiliary DAC configured to receive the auxiliary code and convert the auxiliary code into an analog version of the auxiliary code; and summing circuitry to dither LSBs of the first DAC with the auxiliary code. The auxiliary code generator is configured to update the auxiliary code at a rate less than a sampling rate of the DAC circuit, the auxiliary code has a smaller range than that of a range of binary-weighted LSBs of the main DAC and/or the auxiliary code generator is configured to produce the auxiliary code as a predetermined repeating sequence.Type: GrantFiled: November 18, 2021Date of Patent: August 15, 2023Assignee: MEDIATEK Singapore Pte. Ltd.Inventors: Boyi Zheng, Nathan Egan, Stacy Ho, Gerhard Mitteregger
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Publication number: 20220271771Abstract: A digital to analog (DAC) circuit that performs least significant bit (LSB) dithering comprises: a first DAC; an auxiliary code generator configured to produce an auxiliary code; an auxiliary DAC configured to receive the auxiliary code and convert the auxiliary code into an analog version of the auxiliary code; and summing circuitry to dither LSBs of the first DAC with the auxiliary code. The auxiliary code generator is configured to update the auxiliary code at a rate less than a sampling rate of the DAC circuit, the auxiliary code has a smaller range than that of a range of binary-weighted LSBs of the main DAC and/or the auxiliary code generator is configured to produce the auxiliary code as a predetermined repeating sequence.Type: ApplicationFiled: November 18, 2021Publication date: August 25, 2022Applicant: MediaTek Singapore Pte. Ltd.Inventors: Boyi Zheng, Nathan Egan, Stacy Ho, Gerhard Mitteregger
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Patent number: 10833697Abstract: Circuits and methods for converting digital input signals into the analog domain are described. Such circuits may perform the conversion in a segmented fashion. For example, a circuit may include a most significant bit (MSB) path and a least significant bit (LSB) path. The MSB path may include a first delta-sigma modulator having first and second outputs and a first digital-to-analog converter coupled to the first output of the first delta-sigma modulator. The LSB path comprises a second delta-sigma modulator comprising a loop filter and a quantizer. The quantizer may have an input coupled to the loop filter and to the digital filter. The LSB path may further include a second digital-to-analog converter coupled to an output of the quantizer. The circuit may further include a digital filter and/or a gain stage interposed between the MSB path and the LSB path.Type: GrantFiled: September 3, 2019Date of Patent: November 10, 2020Assignee: MEDIATEK Singapore Pte. Ltd.Inventors: Ayman Shabra, Stacy Ho, Michael A. Ashburn, Jr.
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Publication number: 20200083900Abstract: Circuits and methods for converting digital input signals into the analog domain are described. Such circuits may perform the conversion in a segmented fashion. For example, a circuit may include a most significant bit (MSB) path and a least significant bit (LSB) path. The MSB path may include a first delta-sigma modulator having first and second outputs and a first digital-to-analog converter coupled to the first output of the first delta-sigma modulator. The LSB path comprises a second delta-sigma modulator comprising a loop filter and a quantizer. The quantizer may have an input coupled to the loop filter and to the digital filter. The LSB path may further include a second digital-to-analog converter coupled to an output of the quantizer. The circuit may further include a digital filter and/or a gain stage interposed between the MSB path and the LSB path.Type: ApplicationFiled: September 3, 2019Publication date: March 12, 2020Applicant: MEDIATEK Singapore Pte. Ltd.Inventors: Ayman Shabra, Stacy Ho, Michael A. Ashburn, JR.
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Patent number: 10483947Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.Type: GrantFiled: October 11, 2018Date of Patent: November 19, 2019Assignee: MEDIATEK INC.Inventors: Tien-Yu Lo, Chan-Hsiang Weng, Patrick Cooney, Tsung-Kai Kao, Stacy Ho
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Publication number: 20190288672Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.Type: ApplicationFiled: October 11, 2018Publication date: September 19, 2019Inventors: Tien-Yu LO, Chan-Hsiang WENG, Patrick Cooney, Tsung-Kai KAO, Stacy HO
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Patent number: 9722746Abstract: Methods and apparatus for providing bandpass analog to digital conversion (ADC) in RF receiver circuitry of a wireless-communication device. The bandpass ADC includes first noise-shaping successive approximation register (NS-SAR) circuitry arranged in a first path and second NS-SAR circuitry arranged in a second path parallel to the first path, wherein the first and second NS-SAR circuitries are configured to alternately sample an analog input voltage at a particular sampling rate and to output a digital voltage at the particular sampling rate.Type: GrantFiled: May 26, 2016Date of Patent: August 1, 2017Assignee: MediaTek Inc.Inventors: Stacy Ho, Wei-Hsin Tseng
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Publication number: 20170085349Abstract: Methods and apparatus for providing bandpass analog to digital conversion (ADC) in RF receiver circuitry of a wireless-communication device. The bandpass ADC includes first noise-shaping successive approximation register (NS-SAR) circuitry arranged in a first path and second NS-SAR circuitry arranged in a second path parallel to the first path, wherein the first and second NS-SAR circuitries are configured to alternately sample an analog input voltage at a particular sampling rate and to output a digital voltage at the particular sampling rate.Type: ApplicationFiled: May 26, 2016Publication date: March 23, 2017Applicant: MediaTek Inc.Inventors: Stacy Ho, Wei-Hsin Tseng
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Publication number: 20170033801Abstract: A delta-sigma modulator includes a signal subtraction circuit, a loop filter, a quantizer, a digital-to-analog converter (DAC), and a control circuit. The signal subtraction circuit subtracts an analog feedback signal from an analog input signal to generate a difference signal. The loop filter performs a filtering operation upon the difference signal to generate a filtered signal. The quantizer quantizes the filtered signal into a digital out put signal, wherein at least one inherent circuit characteristic of the quantizer are adjusted in response to a digital code input. The DAC generates the analog feedback signal according to the digital output signal. The control circuit generates the digital code input to the quantizer for setting an excess loop delay (ELD) compensation.Type: ApplicationFiled: January 20, 2015Publication date: February 2, 2017Applicant: Mediatek Singapore PTE. LTD.Inventors: Chi-Lun Lo, Stacy Ho
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Publication number: 20140361912Abstract: An automatic gain control circuit includes an input gain stage for receiving and amplifying an analog input signal; an analog-to-digital converter for receiving the amplified analog input signal and providing a digital output signal; and an overload management module. The overload management module is arranged to receive the digital output signal; determine therefrom whether the received, amplified analog input signal exceeds an operating range of the analog-to-digital converter; and provide a first control signal to the input gain stage to adjust a gain of the input gain stage in response thereto.Type: ApplicationFiled: June 7, 2013Publication date: December 11, 2014Inventors: José Barreiro da Silva, Stacy Ho, Jeffrey Carl Gealow
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Patent number: 8890727Abstract: An automatic gain control circuit includes an input gain stage for receiving and amplifying an analog input signal; an analog-to-digital converter for receiving the amplified analog input signal and providing a digital output signal; and an overload management module. The overload management module is arranged to receive the digital output signal; determine therefrom whether the received, amplified analog input signal exceeds an operating range of the analog-to-digital converter; and provide a first control signal to the input gain stage to adjust a gain of the input gain stage in response thereto.Type: GrantFiled: June 7, 2013Date of Patent: November 18, 2014Assignee: MediaTek Singapore Pte. Ltd.Inventors: José Barreiro da Silva, Stacy Ho, Jeffrey Carl Gealow
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Patent number: 7969340Abstract: A segmented digital-to-analog converter (DAC) is disclosed. In the present invention, the segmented DAC of the present invention comprises a signal component processing stage and a plurality of noise component processing stages cascaded with the signal component processing stage. A noise component of an input word for the DAC is split into a plurality of portions to be processed. By doing so, effect due to gain mismatch(es) in an analog portion of the DAC can be effectively reduced without significantly increasing DAC cells used in the DAC.Type: GrantFiled: July 22, 2009Date of Patent: June 28, 2011Assignee: Mediatek Inc.Inventors: Chih-hong Lou, Kuan-hung Chen, Stacy Ho
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Publication number: 20110018753Abstract: A segmented digital-to-analog converter (DAC) is disclosed. In the present invention, the segmented DAC of the present invention comprises a signal component processing stage and a plurality of noise component processing stages cascaded with the signal component processing stage. A noise component of an input word for the DAC is split into a plurality of portions to be processed.Type: ApplicationFiled: July 22, 2009Publication date: January 27, 2011Applicant: MEDIATEK INC.Inventors: Chih-hong Lou, Kuan-hung Chen, Stacy Ho
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Patent number: 6897715Abstract: A multimode voltage regulator includes a low current pass device and a high current pass device each adapted for connection between a power supply and a load; an error amplifier responsive to a difference between a reference voltage and a function of the voltage on the load to produce an error signal; and a low power driver responsive in a low load power mode to an error signal for operating the low current pass device to provide low power to the load and a high power driver responsive in a high load power mode to an error signal for operating the high current pass device to provide high power to the load for maintaining efficiency over high and low power load operation.Type: GrantFiled: May 12, 2003Date of Patent: May 24, 2005Assignee: Analog Devices, Inc.Inventors: Thomas James Barber, Jr., Stacy Ho, Paul Ferguson, Jr.
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Patent number: 6819165Abstract: A voltage regulator with dynamically boosted bias current includes a pass device for providing current to a load; an error circuit responsive to a difference between a predetermined reference voltage and a function of the voltage on the load to produce an error signal, a driver circuit responsive to the error signal for controlling the pass device to adjust the current to the load to reduce the error signal, the driver circuit including an amplifier responsive to the error signal for controlling the pass device, a bias current source for biasing the amplifier, a sensing circuit for sensing a portion of the error signal, a reference current source for providing a reference current, a second error circuit responsive to a difference between the portion of the error signal and the reference current to produce a second error current; and a boost circuit responsive to the second error signal to increase the bias current provided to the amplifier when the load demands more current.Type: GrantFiled: May 12, 2003Date of Patent: November 16, 2004Assignee: Analog Devices, Inc.Inventors: Stacy Ho, Thomas James Barber, Jr.
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Patent number: 6695778Abstract: The present invention provides methods and systems for generating ultrasound images of a plurality of scatterers disposed in a target region. More particularly, a method of the invention derives model response functions for each of a plurality of transducers for a given distribution of scattering media. The interrogation pattern can be selected to include a set of unfocused ultrasound waves generated by one or more of the transducers. The interrogation pattern is transmitted into the target region, and the transducers are utilized to detect echoes generated by the scatterers in the target region in response to the interrogation pattern. The methods and systems of the invention advantageously allow obtaining ultrasound images of a target region without employing beamforming either in transmission of ultrasound waves into the region or in detection of echoes generated by scatterers in the target region in response to the transmitted waves.Type: GrantFiled: July 3, 2002Date of Patent: February 24, 2004Assignee: AITech, Inc.Inventors: Polina Golland, Stacy Ho
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Publication number: 20040008077Abstract: A voltage regulator with dynamically boosted bias current includes a pass device for providing current to a load; an error circuit responsive to a difference between a predetermined reference voltage and a function of the voltage on the load to produce an error signal, a driver circuit responsive to the error signal for controlling the pass device to adjust the current to the load to reduce the error signal, the driver circuit including an amplifier responsive to the error signal for controlling the pass device, a bias current source for biasing the amplifier, a sensing circuit for sensing a portion of the error signal, a reference current source for providing a reference current, a second error circuit responsive to a difference between the portion of the error signal and the reference current to produce a second error current; and a boost circuit responsive to the second error signal to increase the bias current provided to the amplifier when the load demands more current.Type: ApplicationFiled: May 12, 2003Publication date: January 15, 2004Inventors: Stacy Ho, Thomas James Barber
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Publication number: 20040006271Abstract: The present invention provides methods and systems for generating ultrasound images of a plurality of scatterers disposed in a target region. More particularly, a method of the invention derives model response functions for each of a plurality of transducers for a given distribution of scattering media. The interrogation pattern can be selected to include a set of unfocused ultrasound waves generated by one or more of the transducers. The interrogation pattern is transmitted into the target region, and the transducers are utilized to detect echoes generated by the scatterers in the target region in response to the interrogation pattern. The methods and systems of the invention advantageously allow obtaining ultrasound images of a target region without employing beamforming either in transmission of ultrasound waves into the region or in detection of echoes generated by scatterers in the target region in response to the transmitted waves.Type: ApplicationFiled: July 3, 2002Publication date: January 8, 2004Inventors: Polina Golland, Stacy Ho
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Publication number: 20040000896Abstract: A multimode voltage regulator includes a low current pass device and a high current pass device each adapted for connection between a power supply and a load; an error amplifier responsive to a difference between a reference voltage and a function of the voltage on the load to produce an error signal; and a low power driver responsive in a low load power mode to an error signal for operating the low current pass device to provide low power to the load and a high power driver responsive in a high load power mode to an error signal for operating the high current pass device to provide high power to the load for maintaining efficiency over high and low power load operation.Type: ApplicationFiled: May 12, 2003Publication date: January 1, 2004Inventors: Thomas James Barber, Stacy Ho, Paul Ferguson
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Publication number: 20030157915Abstract: A homodyne receiver is provided for receiving GSM and UMTS transmissions. The receiver may also be used for other transmission schemes. The receiver includes an electronically reconfigurable low pass filter and an off set generator for providing DC offset correction for offsets which may be generated as a result of coupling between a local radio frequency oscillator and the receiver front end.Type: ApplicationFiled: December 30, 2002Publication date: August 21, 2003Inventors: Simon Atkinson, Palle Birk, Stacy Ho, Zoran Zvonar, Aidan Cahalane