Patents by Inventor Stanley C Beddingfield

Stanley C Beddingfield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8049119
    Abstract: A packaged integrated circuit (IC) (100) includes a first substrate (110) comprising a first plurality of layers and a first circuit coupling features (112) at an upper surface of the first substrate (110), the first plurality of layers including a first electromagnetic interference shielding layer (132). The packaged IC also includes a second substrate (106) having an upper surface attached to a lower surface of the first substrate (110) by an electrically conductive adhesive material (136). The second substrate (106) includes a second plurality of layers and a second circuit coupling feature (108) at a lower surface of the second substrate (106). The first plurality of layer includes a second EMI shielding layer (134). The packaged IC further includes a functional die (124) disposed between the first (110) and the second (106) substrates and functionally coupled to the first (112) and/or the second (108) circuit coupling features.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: November 1, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Stanley C Beddingfield, Jean-Francois Drouard
  • Patent number: 5726502
    Abstract: A semiconductor device (30) includes a bumped semiconductor die (32) having a plurality of input/output (I/O) bumps (36) and a plurality of alignment bumps (38). Alignment bumps (38) are formed at the same time as I/O bumps (36) and are used by a vision system to properly align die (32) to a mounting substrate (34) for attachment thereto. Because the alignment bumps are smaller than the I/O bumps, the alignment bumps are not damaged during manufacturing operations such as wafer probe, burn-in, or test, and therefore maintain their original shape. The vision system can thus use the alignment bumps to repeatedly and accurately align the die to the mounting substrate, thereby eliminating misalignment caused by damage to the I/O bumps.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: March 10, 1998
    Assignee: Motorola, Inc.
    Inventor: Stanley C. Beddingfield
  • Patent number: 5710071
    Abstract: A flip-chip semiconductor device (70) is formed by mounting a semiconductor die (20) to a wiring substrate (30). The wiring substrate includes a hole (39). An underfill encapsulation material (52) is dispensed around an entire perimeter of the semiconductor die. The underfill encapsulation material then flows toward the center of the die, expelling any trapped air through hole (39) of the wiring substrate to avoid voiding. By providing a method which utilizes an entire perimeter dispense, manufacturing time of the underfilling step is significantly reduced. At the same time, a uniform fillet is formed and the formation of voids in the underfill encapsulation material is avoided due to the presence of hole (39) in the wiring substrate. Multiple die (100) can also be underfilled using a single dispensing operation in accordance with the invention.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: January 20, 1998
    Assignee: Motorola, Inc.
    Inventors: Stanley C. Beddingfield, Leo M. Higgins, III, John C. Gentile