Abstract: A method is disclosed for producing coplanar metal/insulator films on a substrate according to a chem-mech polishing technique. In one example, a substrate having a patterned insulating layer of dielectric material thereon, is coated with a layer of metal. The substrate is then placed in a parallel polisher and the metal is removed elsewhere except in the holes where it is left intact. This is made possible through the use of an improved selective slurry which removes the metal much faster than the dielectric material. The insulating layer may then be used as an automatic etch stop barrier.In a second example a substrate having a patterned metallic layer is coated with an insulating layer and then subjected to chem-mech polishing. The structure is coplanarized by the chem-mech removal of the insulating material from the high points of the structure at a faster rate than from the lower points. Optional etch stop layers also may be used.

Abstract: In a field effect device such as a charge coupled device or field effect transistor in which at least two levels of polycrystalline silicon conductors are used; these two levels of polycrystalline silicon are isolated from one another with a dielectric layer. Disclosed is a composite dielectric layer formed either by in situ oxidation of the first polycrystalline silicon layer plus chemical vapor deposited silicon dioxide or, in the alternative, the composite dielectric layer is formed by a phosphosilicate glass layer with thermal reoxidation of the first polycrystalline silicon layer.

Abstract: A contact structure in a double polysilicon device is described in which direct shorts between overlying polysilicon conductors due to a "polysilicon void phenomenon" is overcome by patterning an appropriate etch stop between the conductors.

Abstract: A contact structure in a double polysilicon device is described in which direct shorts between overlying polysilicon conductors due to a "polysilicon void phenomenon" is overcome by patterning an appropriate etch stop between the conductors.

Abstract: In a field effect device such as a charge coupled device or field effect transistor in which at least two levels of polycrystalline silicon conductors are used; these two levels of polycrystalline silicon are isolated from one another with a dielectric layer. Disclosed is a composite dielectric layer formed either by in situ oxidation of the first polycrystalline silicon layer plus chemical vapor deposited silicon dioxide or, in the alternative, the composite dielectric layer is formed by a phosphosilicate glass layer with thermal reoxidation of the first polycrystalline silicon layer.