Abstract: A connector (103) is provided having a plurality of leads generally arranged in columns extending substantially parallel each other in a column direction (C) and being adjacent each other in a row direction (R). At least one first column comprises at least one first pair of single leads (S) substantially parallel each other in a first pair direction (P) to form a first differential pair. In at least a portion of the connector the first pair direction extends at an acute angle (a) to the column direction. Further, an assembly, and a circuit board are provided.

Abstract: A connector is provided having a plurality of leads generally arranged in columns extending substantially parallel each other in a column direction and being adjacent each other in a row direction. At least one first column includes at least one first pair of signal leads substantially parallel each other in a first pair direction to form a first differential pair. In at least a portion of the connector the first pair direction extends at an acute angle to the column direction. Further, an assembly, and a circuit board are provided.

Abstract: A connector is provided having a plurality of leads generally arranged in columns extending substantially parallel each other in a column direction and being adjacent each other in a row direction. At least one first column includes at least one first pair of signal leads substantially parallel each other in a first pair direction to form a first differential pair. In at least a portion of the connector the first pair direction extends at an acute angle to the column direction. Further, an assembly, and a circuit board are provided.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.

Abstract: An electrical connector having a leadframe housing, a first electrical contact fixed in the leadframe housing, a second electrical contact fixed adjacent to the first electrical contact in the leadframe housing, and a third electrical contact fixed adjacent to the second electrical contact in the leadframe housing is disclosed. Each of the first and second electrical contacts may be selectively designated, while fixed in the lead frame housing, as either a ground contact or a signal contact such that, in a first designation, the first and second contacts form a differential signal pair, and, in a second designation, the second contact is a single-ended signal conductor. The third electrical contact may be a ground contact having a terminal end that extends beyond terminal ends of the first and second contacts.

Abstract: An electrical connector that includes first and second linear arrays of electrical contacts is disclosed. The first linear array is arranged in a first pattern of signal contacts and ground contacts. The second linear array is arranged in a second pattern of signal contacts and ground contacts that is different from the first pattern. The signal contacts define differential signal pairs. The signal contacts in the first linear array are elongated along a direction along which the first linear array extends.

Abstract: An electrical connector that includes a linear array of electrical blade contacts is disclosed. Each contact may have a free-ended mating portion that extends from a mate surface of a dielectric base. The first linear array may include a first signal contact, a second signal contact positioned adjacent to the first signal contact and forming a differential signal pair therewith, and a ground contact positioned adjacent to the second signal contact. The first signal contact, the second signal contact, and the ground contact may each be elongated in a direction along the linear array.

Abstract: Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance.

Abstract: An electrical connector that includes first and second linear arrays of electrical contacts is disclosed. The first linear array includes a first differential signal pair, a first ground contact lead adjacent to the first differential signal pair, and a second ground contact lead adjacent to the first ground contact lead. The second linear array is positioned adjacent to the first linear array, and includes a second differential signal pair, a third ground contact lead adjacent to the second differential signal pair, and a fourth ground contact lead adjacent to the third ground contact lead. The electrical connector is devoid of electrical shields between the first linear array and the second linear array.

Abstract: The invention relates to a system for connecting a first part and a second part, wherein the first part comprises a power supply line, a plurality of signal contacts and a plurality of ground contacts and the second part comprises a plurality of corresponding signal contacts and a plurality of corresponding ground contacts. The power supply line is connected via at least one ground contact of said first part to a corresponding ground contact of said second part. The first part may be a device board and said second part may be a connector assembly. The invention further relates to a cable connector for use in such a system.

Abstract: Lightweight, low-cost, high-density electrical connectors are disclosed that provide impedance-controlled, high-speed, low-interference communications, even in the absence of shields between the contacts, and that provide for a variety of other benefits not found in prior art connectors. An example of such an electrical connector may include a first signal contact positioned within a first linear array of electrical contacts and a second signal contact positioned within a second linear array of electrical contacts that is adjacent to the first linear array. Either of the signal contacts may be a single-ended signal conductor, or one of a differential signal pair. The connector may be devoid of shields between the signal contacts, and of ground contacts adjacent to the signal contacts.

Abstract: A preferred embodiment of a cable harness assembly includes a shielded cable comprising a first and a second conductor for conducting a pair of differential signals, and a generally planar board having a first and a second electrically-conductive trace formed thereon and having a first and a second major surface. The first trace is electrically coupled to the first conductor at a first location on the first major surface and extends along the first major surface to a second location on the first major surface. The second trace is electrically coupled to the second conductor at a third location on the first major surface and extends along the first and the second major surfaces to a fourth location on the second major surface.

Abstract: A preferred embodiment of a cable harness assembly includes a shielded cable comprising a first and a second conductor for conducting a pair of differential signals, and a generally planar board having a first and a second electrically-conductive trace formed thereon and having a first and a second major surface. The first trace is electrically coupled to the first conductor at a first location on the first major surface and extends along the first major surface to a second location on the first major surface. The second trace is electrically coupled to the second conductor at a third location on the first major surface and extends along the first and the second major surfaces to a fourth location on the second major surface.