Abstract: A circuit for generating a reference potential includes a first transistor having an emitter connected to a ground potential, a base, and a collector connected to the base; a second transistor having a base connected to the base of the first transistor; a first resistor connected between the collector of the first transistor and an output terminal outputting the reference potential; a second resistor connected between the collector of the second transistor and the output terminal; a third resistor connected between the emitter of the second transistor and ground potential; a third transistor having a base connected to the collector of the second transistor, and an emitter connected to the ground potential; a fourth transistor having a collector connected to a supply potential, an emitter connected to the output terminal, and a base connected to the collector of the third transistor; a first current source connected between the base and the collector of the fourth transistor; and a second current source connec

Abstract: An amplifier array for high-frequency signals includes a differential amplifier with transistors capacitively coupled to the emitters. The differential amplifier therefore has high-pass characteristics. The input signals are each supplied to the differential amplifier through a respective high-pass. This results in an integratable amplifier array with strong damping for base-band signal components and band-pass characteristics for high-frequency useful signal components.

Abstract: An amplifier array having digitally adjustable total gain and being constructed of a multiplicity of switchable individual amplifiers, includes at least two parallel, selectively triggerable gain paths having input and output sides. Each of the gain paths has an input amplifier and a switching amplifier being connected downstream of the input amplifier and being switchable in stages. A multiplexer has inputs connected to the output side of the gain paths and has an output. An amplifier array input is connected to the input side of the gain paths and an amplifier array output is formed by the output of the multiplexer. In a mobile radio receiver having the amplifier array, a total gain of the amplifier array is adjusted for setting an output signal of the mobile radio receiver at a constant level.

Abstract: A circuit configuration being made by differential technology for dividing a clock signal with switchable divider ratios of 4/5 by emitter coupled logic, includes first, second and third series-connected flip-flops each having an output, a data input and a clock input. The output of the second flip-flop is coupled to the data input of the third flip-flop, and the clock inputs of the first, second and third flip-flops are acted upon by a clock signal. A first AND gate is connected upstream of the first flip-flop and has a first input being acted upon by a control signal for switching over the divider ratio, and a second input being acted upon by an inverted signal from the output of the third flip-flop.