Patents by Inventor Stefan Kredler

Stefan Kredler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8125070
    Abstract: A semiconductor component has at least one semiconductor chip in which an electrical circuit is integrated. The semiconductor chip is surrounded by an electrically insulating encapsulating compound and has on its surface at least one termination surface for a test signal, which is covered by the encapsulating compound. The termination surface is connected in an electrically conductive manner to an analysis contact that projects above the surface of the semiconductor chip, that is located in the interior of the encapsulating compound at a distance from its exterior surface, and that can be exposed by removing a layer of the encapsulating compound located near the exterior.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: February 28, 2012
    Assignee: Micronas GmbH
    Inventors: Stefan Kredler, Reiner Bidenbach, Jens Schubert, Klaus Heberle
  • Publication number: 20090152548
    Abstract: A semiconductor component (has at least one semiconductor chip in which an electrical circuit is integrated. The semiconductor chip is surrounded by an electrically insulating encapsulating compound and has on its surface at least one termination surface for a test signal, which is covered by the encapsulating compound. The termination surface is connected in an electrically conductive manner to an analysis contact that projects above the surface of the semiconductor chip, that is located in the interior of the encapsulating compound at a distance from its exterior surface, and that can be exposed by removing a layer of the encapsulating compound located near the exterior.
    Type: Application
    Filed: December 17, 2008
    Publication date: June 18, 2009
    Applicant: MICRONAS GMBH
    Inventors: Stefan Kredler, Reiner Bidenbach, Jens Schubert, Klaus Heberle
  • Patent number: 7492178
    Abstract: A method for testing a Hall magnetic field sensor on a wafer includes generating a current flow in a Hall plate of the Hall magnetic field sensor. At least one voltage value across first and second nodes is measured and a measured voltage signal is provided indicative thereof. An electrical resistance based upon the measured voltage and the current is then determined, in the absence of an applied test magnet field.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: February 17, 2009
    Assignee: Micronas GmbH
    Inventors: Reiner Bidenbach, Jens Schubert, Stefan Kredler, Ralf Janke
  • Publication number: 20060284612
    Abstract: A method for testing a Hall magnetic field sensor on a wafer includes generating a current flow in a Hall plate of the Hall magnetic field sensor. At least one voltage value across first and second nodes is measured and a measured voltage signal is provided indicative thereof. An electrical resistance based upon the measured voltage and the current is then determined, in the absence of an applied test magnet field.
    Type: Application
    Filed: June 19, 2006
    Publication date: December 21, 2006
    Inventors: Reiner Bidenbach, Jens Schubert, Stefan Kredler, Ralf Janke