Patents by Inventor Stefan M. Wurster
Stefan M. Wurster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180374413Abstract: Implementations described herein disclose a laser diode driver that allows switching low-voltage (LV) high-speed devices with while driving high voltage current to a laser diode without risking destroying the LV devices. Specifically, the laser diode driver disclosed herein is a pulsed high speed digital to analog (DAC) driver that uses high-speed LV transistors in advanced nodes for high-speed switching of current nodes.Type: ApplicationFiled: January 12, 2018Publication date: December 27, 2018Inventors: Richard MCCAULEY, Barry THOMPSON, Stefan M. WURSTER
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Patent number: 10088861Abstract: Two transistors are connected between a power source and separate current references. The base of the first transistor is connected to a bias voltage, and the base of the second transistor is connected to the output of a differential amplifier. The amplifier inputs are connected to the nodes where the transistors are connected to the current references. The transistors and the current references may be of different sizes, such that the output voltage of the amplifier is a function of temperature and of the product of the ratios of the transistors and the current references. A number of switches may be employed such that, in alternative modes of operation, the amplifier is used to buffer the bias voltage, the offset of the amplifier, the output of the first transistor, and/or a stored sample of the temperature output voltage, which are combined to arrive at an adjusted temperature reading.Type: GrantFiled: March 22, 2017Date of Patent: October 2, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Shaun M. McCarthy, Mustansir Y. Mukadam, Stefan M. Wurster, Barry Thompson, Dane R. Snow
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Publication number: 20180143658Abstract: Two transistors are connected between a power source and separate current references. The base of the first transistor is connected to a bias voltage, and the base of the second transistor is connected to the output of a differential amplifier. The amplifier inputs are connected to the nodes where the transistors are connected to the current references. The transistors and the current references may be of different sizes, such that the output voltage of the amplifier is a function of temperature and of the product of the ratios of the transistors and the current references. A number of switches may be employed such that, in alternative modes of operation, the amplifier is used to buffer the bias voltage, the offset of the amplifier, the output of the first transistor, and/or a stored sample of the temperature output voltage, which are combined to arrive at an adjusted temperature reading.Type: ApplicationFiled: March 22, 2017Publication date: May 24, 2018Inventors: Shaun M. McCarthy, Mustansir Y. Mukadam, Stefan M. Wurster, Barry Thompson, Dane R. Snow
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Patent number: 5777996Abstract: An inter-repeater backplane that allows seamless integration of multiple repeaters into a single hub and wherein each repeater may be swapped out without causing the backplane to crash, hang-up or pass error messages. The mixed signal state machines operate in conjunction with the dual analog, digital collision signaling scheme so that repeaters can be removed from the hub without causing the remaining repeaters in the hub to malfunction. Additional drivers or external glue logic are not needed for arbitration because PORTN and PORTM information is embedded within the backplane signals. Thus, the backplane scheme according to the present invention is completely seamless.Type: GrantFiled: October 29, 1996Date of Patent: July 7, 1998Assignee: Level One Communications, Inc.Inventors: David T. Chan, Joseph E. Heideman, Haim Shafir, Stefan M. Wurster, David S. Wong
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Patent number: 5717714Abstract: An inter-repeater backplane employs both analog and digital circuitry to convey state machine information to adjacent repeaters thereby allowing seamless integration of multiple repeaters into a single hub without requiring additional drivers or external glue logic. A data path allows the passage of data between multiple repeaters on the inter-repeater backplane and an inter-repeater backplane enable allows individual repeaters to take control of the inter-repeater backplane data bus. An inter-repeater backplane driver enables external bus drivers which may be required in synchronous systems with large backplanes. An inter-repeater backplane clock is used to synchronize multiple repeaters on the inter-repeater backplane. Only two leads (IRCOL and IRCFS) are used to provide transmit and receive collision information. These two leads in conjunction with IRENA also indicate which repeater is receiving data.Type: GrantFiled: January 30, 1995Date of Patent: February 10, 1998Assignee: Level One Communications, Inc.Inventors: Ralph E. Andersson, Joseph E. Heideman, David T. Chan, Haim Shafir, Stefan M. Wurster, David S. Wong
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Patent number: 5574726Abstract: An inter-repeater backplane that allows either synchronous or asynchronous data transmission between multiple repeaters integrated into a single hub and enables any repeater to be swapped out without causing the backplane to crash, hang-up, or pass error messages. A dual analog, digital collision signaling scheme is utilized to obviate the need for additional drivers or external glue logic for arbitration. "the specific port of a hub receiving data (PORTN)". and The one port left state (PORTM) information is embedded within the backplane signals. Thus, the backplane scheme according to the present invention is completely seamless. Unique state machines enable the repeater to transmit data either synchronously or asynchronously. In the synchronous mode of data transmission, the data is synchronized with the system clock. When the asynchronous mode of data transmission is selected, the recovered data is synchronized with a clock signal associated with the transmitting repeater.Type: GrantFiled: January 30, 1995Date of Patent: November 12, 1996Assignee: Level One Communications, Inc.Inventors: David T. Chan, Haim Shafir, Stefan M. Wurster
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Patent number: 5267269Abstract: A data communication system employing predetermined equalized waveforms for transmit equalization is disclosed. Serial NRZ data is received from a network controller and utilized to select from memory its equivalent as predistorted and filtered Manchester encoded data. Predetermined waveforms in memory are representative of the analog waveform produced when predistorted digital Manchester encoded data is passed through a high order transmit filter. Data from memory drives a digital to analog converter (DAC) to reconstruct the waveforms into analog form. A line driver having an integrated single pole low pass filter impresses the equalized waveform on to the transmission line.Type: GrantFiled: September 4, 1991Date of Patent: November 30, 1993Assignee: Level One Communications, Inc.Inventors: Cheng-chung Shih, Haim Shafir, Stefan M. Wurster, Cecil Aswell, Daniel L. Ray, Joseph E. Heideman
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Patent number: 5204880Abstract: A two terminal line driver employing predistortion is disclosed, for driving data over a lossy transmission line such as a twisted pair cable at speeds on upwards of 10 Mbit/s. The driver is designed for voltage output operation wherein fullstep and halfstep information is actively encoded into a voltage level provided for at the output terminals. The driver provides a fullstep voltage spanning the supply rails and a halfstep voltage having a selectable controlled amplitude of a predetermined value. Fat bits resulting from the biphase encoding format are predistorted by dropping the amplitude to a predetermined value, equalizing the relative power content.Type: GrantFiled: April 23, 1991Date of Patent: April 20, 1993Assignee: Level One Communications, Inc.Inventors: Stefan M. Wurster, Daniel L. Ray